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Commit 6f26d19f authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
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sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec 



Update the sh7724 processor code to always enable vpu_clk.

On the Ecovec board, set the vpu_clk to 166 Mhz.

The 166MHz setting results in a divide-by-6 setup for
vpu_clk and improves the VPU performance compared to the
power-on-reset/bootloader configuration.

Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 7be85c6e

arch/sh/boards/mach-ecovec24/setup.c

+5 −0
Original line number Diff line number Diff line
@@ -1121,6 +1121,11 @@ static int __init arch_setup(void) 
	gpio_request(GPIO_FN_INTC_IRQ1, NULL);

	gpio_direction_input(GPIO_FN_INTC_IRQ1);



	/* set VPU clock to 166 MHz */

	clk = clk_get(NULL, "vpu_clk");

	clk_set_rate(clk, clk_round_rate(clk, 166000000));

	clk_put(clk);



	/* enable I2C device */

	i2c_register_board_info(0, i2c0_devices,

				ARRAY_SIZE(i2c0_devices));

arch/sh/kernel/cpu/sh4a/clock-sh7724.c

+1 −1
Original line number Diff line number Diff line
@@ -159,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = { 
	[DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),

	[DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),

	[DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),

	[DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0),

	[DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),

};



struct clk div6_clks[] = {