Commit 6e761cd7 authored Mar 23, 2017 by Matthew Gerlach Committed by Greg Kroah-Hartman Apr 08, 2017

fpga dt: bindings for Altera Partial Reconfiguration IP.



Device Tree bindings for Altera Partial Reconfiguration IP.

Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Alan Tull <atull@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent d201cc17

Documentation/devicetree/bindings/fpga/altera-pr-ip.txt

0 → 100644

+12 −0

Original line number	Diff line number	Diff line
		Altera Arria10 Partial Reconfiguration IP

		Required properties:
		- compatible : should contain "altr,a10-pr-ip"
		- reg : base address and size for memory mapped io.

		Example:

		fpga_mgr: fpga-mgr@ff20c000 {
		compatible = "altr,a10-pr-ip";
		reg = <0xff20c000 0x10>;
		};