Commit 6e6e746e authored May 06, 2015 by Aravind Gopalakrishnan Committed by Borislav Petkov May 06, 2015

x86/mce/amd: Collect valid address before logging an error



amd_decode_mce() needs value in m->addr so it can report the error
address correctly. This should be setup in __log_error() before we call
mce_log(). We do this because the error address is an important bit of
information which should be conveyed to userspace.

The correct output then reports proper address, like this:

  [Hardware Error]: Corrected error, no action required.
  [Hardware Error]: CPU:0 (15:60:0) MC0_STATUS [-|CE|-|-|AddrV|-|-|CECC]: 0x840041000028017b
  [Hardware Error]: MC0 Error Address: 0x00001f808f0ff040

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1430913538-1415-3-git-send-email-Aravind.Gopalakrishnan@amd.com


Signed-off-by: Borislav Petkov <bp@suse.de>

parent afdf344e

arch/x86/kernel/cpu/mcheck/mce_amd.c

+4 −1

Original line number	Original line	Diff line number	Diff line
	@@ -277,11 +277,14 @@ static void __log_error(unsigned int bank, bool threshold_err, u64 misc)

	m.status = status;		m.status = status;
	m.bank = bank;		m.bank = bank;

	if (threshold_err)		if (threshold_err)
	m.misc = misc;		m.misc = misc;

	mce_log(&m);		if (m.status & MCI_STATUS_ADDRV)
			rdmsrl(MSR_IA32_MCx_ADDR(bank), m.addr);

			mce_log(&m);
	wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);		wrmsrl(MSR_IA32_MCx_STATUS(bank), 0);
	}		}