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Commit 6dec3a10 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'x86/x2apic' into x86/core 



Conflicts:

	include/asm-x86/i8259.h
	include/asm-x86/msidef.h

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parents 29308333 10a010f6

Documentation/kernel-parameters.txt

+6 −0
Original line number Diff line number Diff line
@@ -1420,6 +1420,12 @@ and is between 256 and 4096 characters. It is defined in the file 


	nolapic_timer	[X86-32,APIC] Do not use the local APIC timer.



	nox2apic	[X86-64,APIC] Do not enable x2APIC mode.



	x2apic_phys	[X86-64,APIC] Use x2apic physical mode instead of

			default x2apic cluster mode on platforms

			supporting x2apic.



	noltlbs		[PPC] Do not use large page/tlb entries for kernel

			lowmem mapping on PPC40x.

arch/x86/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -1652,6 +1652,14 @@ config DMAR_FLOPPY_WA 
	 workaround will setup a 1:1 mapping for the first

	 16M to make floppy (an ISA device) work.



config INTR_REMAP

	bool "Support for Interrupt Remapping (EXPERIMENTAL)"

	depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL

	help

	 Supports Interrupt remapping for IO-APIC and MSI devices.

	 To use x2apic mode in the CPU's which support x2APIC enhancements or

	 to support platforms with CPU's having > 8 bit APIC ID, say Y.



source "drivers/pci/pcie/Kconfig"



source "drivers/pci/Kconfig"

arch/x86/kernel/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -104,6 +104,8 @@ obj-$(CONFIG_OLPC) += olpc.o 
ifeq ($(CONFIG_X86_64),y)

        obj-y				+= genapic_64.o genapic_flat_64.o genx2apic_uv_x.o tlb_uv.o

	obj-y				+= bios_uv.o

        obj-y				+= genx2apic_cluster.o

        obj-y				+= genx2apic_phys.o

        obj-$(CONFIG_X86_PM_TIMER)	+= pmtimer_64.o

        obj-$(CONFIG_AUDIT)		+= audit_64.o

arch/x86/kernel/acpi/boot.c

+3 −1
Original line number Diff line number Diff line
@@ -761,7 +761,7 @@ static void __init acpi_register_lapic_address(unsigned long address) 


	set_fixmap_nocache(FIX_APIC_BASE, address);

	if (boot_cpu_physical_apicid == -1U) {

		boot_cpu_physical_apicid  = GET_APIC_ID(read_apic_id());

		boot_cpu_physical_apicid  = read_apic_id();

#ifdef CONFIG_X86_32

		apic_version[boot_cpu_physical_apicid] =

			 GET_APIC_VERSION(apic_read(APIC_LVR));
@@ -1337,7 +1337,9 @@ static void __init acpi_process_madt(void) 
				acpi_ioapic = 1;



				smp_found_config = 1;

#ifdef CONFIG_X86_32

				setup_apic_routing();

#endif

			}

		}

		if (error == -EINVAL) {

arch/x86/kernel/apic_32.c

+37 −4
Original line number Diff line number Diff line
@@ -145,13 +145,18 @@ static int modern_apic(void) 
	return lapic_get_version() >= 0x14;

}



void apic_wait_icr_idle(void)

/*

 * Paravirt kernels also might be using these below ops. So we still

 * use generic apic_read()/apic_write(), which might be pointing to different

 * ops in PARAVIRT case.

 */

void xapic_wait_icr_idle(void)

{

	while (apic_read(APIC_ICR) & APIC_ICR_BUSY)

		cpu_relax();

}



u32 safe_apic_wait_icr_idle(void)

u32 safe_xapic_wait_icr_idle(void)

{

	u32 send_status;

	int timeout;
@@ -167,6 +172,34 @@ u32 safe_apic_wait_icr_idle(void) 
	return send_status;

}



void xapic_icr_write(u32 low, u32 id)

{

	apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id));

	apic_write(APIC_ICR, low);

}



u64 xapic_icr_read(void)

{

	u32 icr1, icr2;



	icr2 = apic_read(APIC_ICR2);

	icr1 = apic_read(APIC_ICR);



	return icr1 | ((u64)icr2 << 32);

}



static struct apic_ops xapic_ops = {

	.read = native_apic_mem_read,

	.write = native_apic_mem_write,

	.icr_read = xapic_icr_read,

	.icr_write = xapic_icr_write,

	.wait_icr_idle = xapic_wait_icr_idle,

	.safe_wait_icr_idle = safe_xapic_wait_icr_idle,

};



struct apic_ops __read_mostly *apic_ops = &xapic_ops;

EXPORT_SYMBOL_GPL(apic_ops);



/**

 * enable_NMI_through_LVT0 - enable NMI through local vector table 0

 */
@@ -1205,7 +1238,7 @@ void __init init_apic_mappings(void) 
	 * default configuration (or the MP table is broken).

	 */

	if (boot_cpu_physical_apicid == -1U)

		boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());

		boot_cpu_physical_apicid = read_apic_id();



}
@@ -1242,7 +1275,7 @@ int __init APIC_init_uniprocessor(void) 
	 * might be zero if read from MP tables. Get it from LAPIC.

	 */

#ifdef CONFIG_CRASH_DUMP

	boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id());

	boot_cpu_physical_apicid = read_apic_id();

#endif

	physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);