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Commit 6d6fd367 authored by Guennadi Liakhovetski's avatar Guennadi Liakhovetski Committed by Chris Ball
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mmc: sh_mmcif: revision-specific CLK_CTRL2 handling 



Some newer MMCIF IP revisions contain a CE_CLK_CTRL2 register, that has to
be set for proper operation. Support for this feature is added in a way to
preserve the current behaviour by default, i.e. when it is not enabled
in platform data. Patch is based on work by Nobuyuki HIRAI.

Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 967bcb77

drivers/mmc/host/sh_mmcif.c

+4 −0
Original line number Diff line number Diff line
@@ -247,6 +247,7 @@ struct sh_mmcif_host { 
	bool power;

	bool card_present;

	bool ccs_enable;		/* Command Completion Signal support */

	bool clk_ctrl2_enable;

	struct mutex thread_lock;



	/* DMA support */
@@ -497,6 +498,8 @@ static void sh_mmcif_sync_reset(struct sh_mmcif_host *host) 
	sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF);

	if (host->ccs_enable)

		tmp |= SCCSTO_29;

	if (host->clk_ctrl2_enable)

		sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000);

	sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, tmp |

		SRSPTO_256 | SRBSYTO_29 | SRWDTO_29);

	/* byte swap on */
@@ -1398,6 +1401,7 @@ static int sh_mmcif_probe(struct platform_device *pdev) 
	host->addr	= reg;

	host->timeout	= msecs_to_jiffies(1000);

	host->ccs_enable = !pd || !pd->ccs_unsupported;

	host->clk_ctrl2_enable = pd && pd->clk_ctrl2_present;



	host->pd = pdev;

include/linux/mmc/sh_mmcif.h

+2 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ struct sh_mmcif_plat_data { 
	unsigned int		slave_id_rx;

	bool			use_cd_gpio : 1;

	bool			ccs_unsupported : 1;

	bool			clk_ctrl2_present : 1;

	unsigned int		cd_gpio;

	u8			sup_pclk;	/* 1 :SH7757, 0: SH7724/SH7372 */

	unsigned long		caps;
@@ -60,6 +61,7 @@ struct sh_mmcif_plat_data { 
#define MMCIF_CE_INT_MASK	0x00000044

#define MMCIF_CE_HOST_STS1	0x00000048

#define MMCIF_CE_HOST_STS2	0x0000004C

#define MMCIF_CE_CLK_CTRL2	0x00000070

#define MMCIF_CE_VERSION	0x0000007C



/* CE_BUF_ACC */