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Commit 6d39df14 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: Fix vce initialize failed on Kaveri/Mullins 



Forgot to add vce pg support via smu for Kaveri/Mullins.

Fixes: 561a5c83eadd ("drm/amd/pp: Unify powergate_uvd/vce/mmhub
                       to set_powergating_by_smu")

v2: refine patch descriptions suggested by Michel

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Tested-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 8ef23364

drivers/gpu/drm/amd/amdgpu/kv_dpm.c

+26 −15
Original line number Diff line number Diff line
@@ -66,7 +66,6 @@ static int kv_set_thermal_temperature_range(struct amdgpu_device *adev, 
static int kv_init_fps_limits(struct amdgpu_device *adev);



static void kv_dpm_powergate_uvd(void *handle, bool gate);

static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate);

static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate);

static void kv_dpm_powergate_acp(struct amdgpu_device *adev, bool gate);
@@ -1374,6 +1373,8 @@ static int kv_dpm_enable(struct amdgpu_device *adev) 


static void kv_dpm_disable(struct amdgpu_device *adev)

{

	struct kv_power_info *pi = kv_get_pi(adev);



	amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,

		       AMDGPU_THERMAL_IRQ_LOW_TO_HIGH);

	amdgpu_irq_put(adev, &adev->pm.dpm.thermal.irq,
@@ -1387,7 +1388,8 @@ static void kv_dpm_disable(struct amdgpu_device *adev) 
	/* powerup blocks */

	kv_dpm_powergate_acp(adev, false);

	kv_dpm_powergate_samu(adev, false);

	kv_dpm_powergate_vce(adev, false);

	if (pi->caps_vce_pg) /* power on the VCE block */

		amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);

	kv_dpm_powergate_uvd(adev, false);



	kv_enable_smc_cac(adev, false);
@@ -1551,7 +1553,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev, 
	int ret;



	if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) {

		kv_dpm_powergate_vce(adev, false);

		if (pi->caps_stable_p_state)

			pi->vce_boot_level = table->count - 1;

		else
@@ -1573,7 +1574,6 @@ static int kv_update_vce_dpm(struct amdgpu_device *adev, 
		kv_enable_vce_dpm(adev, true);

	} else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) {

		kv_enable_vce_dpm(adev, false);

		kv_dpm_powergate_vce(adev, true);

	}



	return 0;
@@ -1702,24 +1702,32 @@ static void kv_dpm_powergate_uvd(void *handle, bool gate) 
	}

}



static void kv_dpm_powergate_vce(struct amdgpu_device *adev, bool gate)

static void kv_dpm_powergate_vce(void *handle, bool gate)

{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;

	struct kv_power_info *pi = kv_get_pi(adev);



	if (pi->vce_power_gated == gate)

		return;

	int ret;



	pi->vce_power_gated = gate;



	if (!pi->caps_vce_pg)

		return;



	if (gate)

	if (gate) {

		/* stop the VCE block */

		ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,

							     AMD_PG_STATE_GATE);

		kv_enable_vce_dpm(adev, false);

		if (pi->caps_vce_pg) /* power off the VCE block */

			amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerOFF);

	else

	} else {

		if (pi->caps_vce_pg) /* power on the VCE block */

			amdgpu_kv_notify_message_to_smu(adev, PPSMC_MSG_VCEPowerON);

		kv_enable_vce_dpm(adev, true);

		/* re-init the VCE block */

		ret = amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCE,

							     AMD_PG_STATE_UNGATE);

	}

}





static void kv_dpm_powergate_samu(struct amdgpu_device *adev, bool gate)

{

	struct kv_power_info *pi = kv_get_pi(adev);
@@ -3313,6 +3321,9 @@ static int kv_set_powergating_by_smu(void *handle, 
	case AMD_IP_BLOCK_TYPE_UVD:

		kv_dpm_powergate_uvd(handle, gate);

		break;

	case AMD_IP_BLOCK_TYPE_VCE:

		kv_dpm_powergate_vce(handle, gate);

		break;

	default:

		break;

	}