Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6d292310 authored by Boris Brezillon's avatar Boris Brezillon
Browse files

mtd: nand: Declare tBERS, tR and tPROG as u64 to avoid integer overflow



All timings in nand_sdr_timings are expressed in picoseconds but some
of them may not fit in an u32.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 204e7ecd ("mtd: nand: Add a few more timings to nand_sdr_timings")
Reported-by: default avatarAlexander Dahl <ada@thorsis.com>
Cc: <stable@vger.kernel.org>
Reviewed-by: default avatarAlexander Dahl <ada@thorsis.com>
Tested-by: default avatarAlexander Dahl <ada@thorsis.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
parent a11bf5ed
Loading
Loading
Loading
Loading
+3 −3
Original line number Diff line number Diff line
@@ -311,9 +311,9 @@ int onfi_init_data_interface(struct nand_chip *chip,
		struct nand_sdr_timings *timings = &iface->timings.sdr;

		/* microseconds -> picoseconds */
		timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog);
		timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers);
		timings->tR_max = 1000000UL * le16_to_cpu(params->t_r);
		timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog);
		timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers);
		timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r);

		/* nanoseconds -> picoseconds */
		timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);
+3 −3
Original line number Diff line number Diff line
@@ -681,10 +681,10 @@ struct nand_buffers {
 * @tWW_min: WP# transition to WE# low
 */
struct nand_sdr_timings {
	u32 tBERS_max;
	u64 tBERS_max;
	u32 tCCS_min;
	u32 tPROG_max;
	u32 tR_max;
	u64 tPROG_max;
	u64 tR_max;
	u32 tALH_min;
	u32 tADL_min;
	u32 tALS_min;