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Commit 6cd2f8e7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-for-3.10-soc' of... 

Merge tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: core SoC support development

This branch includes major development on the core Tegra SoC support code
in the mach-tegra directory:

* SMP support for Tegra114.
* Exposes SoC chip ID and revision through standard sysfs files.
* System-level suspend/resume for Tegra20/30. At present, this only
  supports "LP2" mode (CPU power-down), but provides the basis to
  implement "LP0"/"LP1" (various levels of core/chip power-down) in the
  hopefully near future.
* A minor cleanup of a duplicate include, which was introduced in this
  branch.

This branch is based on the previous cleanup pull request.

* tag 'tegra-for-3.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra

:
  ARM: tegra: pm: remove duplicated include from pm.c
  ARM: tegra: cpuidle: remove redundant parameters for powered-down mode
  ARM: tegra: pm: add platform suspend support
  ARM: dt: tegra: add bindings of power management configurations for PMC
  ARM: tegra: irq: add wake up handling
  gpio: tegra: add gpio wakeup source handling
  ARM: tegra: moving the CPU power timer function to PMC driver
  ARM: tegra: add clock source of PMC to device trees
  ARM: tegra: add speedo-based process id for Tegra114
  ARM: tegra: expose chip ID and revision
  ARM: tegra: bring up secondary CPU for Tegra114

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3be1812e 38be85de

Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt

+66 −1
Original line number Diff line number Diff line 
NVIDIA Tegra Power Management Controller (PMC)



Properties:

The PMC block interacts with an external Power Management Unit. The PMC

mostly controls the entry and exit of the system from different sleep

modes. It provides power-gating controllers for SoC and CPU power-islands.



Required properties:

- name : Should be pmc

- compatible : Should contain "nvidia,tegra<chip>-pmc".

- reg : Offset and length of the register set for the device

- clocks : Must contain an entry for each entry in clock-names.

- clock-names : Must include the following entries:

  "pclk" (The Tegra clock of that name),

  "clk32k_in" (The 32KHz clock input to Tegra).



Optional properties:

- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.

  The PMU is an external Power Management Unit, whose interrupt output

  signal is fed into the PMC. This signal is optionally inverted, and then

  fed into the ARM GIC. The PMC is not involved in the detection or

  handling of this interrupt signal, merely its inversion.

- nvidia,suspend-mode : The suspend mode that the platform should use.

  Valid values are 0, 1 and 2:

  0 (LP0): CPU + Core voltage off and DRAM in self-refresh

  1 (LP1): CPU voltage off and DRAM in self-refresh

  2 (LP2): CPU voltage off

- nvidia,core-power-req-active-high : Boolean, core power request active-high

- nvidia,sys-clock-req-active-high : Boolean, system clock request active-high

- nvidia,combined-power-req : Boolean, combined power request for CPU & Core

- nvidia,cpu-pwr-good-en : Boolean, CPU power good signal (from PMIC to PMC)

			   is enabled.



Required properties when nvidia,suspend-mode is specified:

- nvidia,cpu-pwr-good-time : CPU power good time in uS.

- nvidia,cpu-pwr-off-time : CPU power off time in uS.

- nvidia,core-pwr-good-time : <Oscillator-stable-time Power-stable-time>

			      Core power good time in uS.

- nvidia,core-pwr-off-time : Core power off time in uS.



Required properties when nvidia,suspend-mode=<0>:

- nvidia,lp0-vec : <start length> Starting address and length of LP0 vector

  The LP0 vector contains the warm boot code that is executed by AVP when

  resuming from the LP0 state. The AVP (Audio-Video Processor) is an ARM7

  processor and always being the first boot processor when chip is power on

  or resume from deep sleep mode. When the system is resumed from the deep

  sleep mode, the warm boot code will restore some PLLs, clocks and then

  bring up CPU0 for resuming the system.



Example:



/ SoC dts including file

pmc@7000f400 {

	compatible = "nvidia,tegra20-pmc";

	reg = <0x7000e400 0x400>;

	clocks = <&tegra_car 110>, <&clk32k_in>;

	clock-names = "pclk", "clk32k_in";

	nvidia,invert-interrupt;

	nvidia,suspend-mode = <1>;

	nvidia,cpu-pwr-good-time = <2000>;

	nvidia,cpu-pwr-off-time = <100>;

	nvidia,core-pwr-good-time = <3845 3845>;

	nvidia,core-pwr-off-time = <458>;

	nvidia,core-power-req-active-high;

	nvidia,sys-clock-req-active-high;

	nvidia,lp0-vec = <0xbdffd000 0x2000>;

};



/ Tegra board dts file

{

	...

	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		clk32k_in: clock {

			compatible = "fixed-clock";

			reg=<0>;

			#clock-cells = <0>;

			clock-frequency = <32768>;

		};

	};

	...

};

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -673,6 +673,7 @@ config ARCH_TEGRA 
	select HAVE_CLK

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select SOC_BUS

	select SPARSE_IRQ

	select USE_OF

	help

arch/arm/boot/dts/tegra114-dalmore.dts

+13 −0
Original line number Diff line number Diff line
@@ -18,4 +18,17 @@ 
	pmc {

		nvidia,invert-interrupt;

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		clk32k_in: clock {

			compatible = "fixed-clock";

			reg=<0>;

			#clock-cells = <0>;

			clock-frequency = <32768>;

		};

	};

};

arch/arm/boot/dts/tegra114-pluto.dts

+13 −0
Original line number Diff line number Diff line
@@ -18,4 +18,17 @@ 
	pmc {

		nvidia,invert-interrupt;

	};



	clocks {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <0>;



		clk32k_in: clock {

			compatible = "fixed-clock";

			reg=<0>;

			#clock-cells = <0>;

			clock-frequency = <32768>;

		};

	};

};

arch/arm/boot/dts/tegra114.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -101,6 +101,8 @@ 
	pmc {

		compatible = "nvidia,tegra114-pmc";

		reg = <0x7000e400 0x400>;

		clocks = <&tegra_car 261>, <&clk32k_in>;

		clock-names = "pclk", "clk32k_in";

	};



	iommu {