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Commit 6c9d1617 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'at91-fixes' of git://github.com/at91linux/linux-at91 into fixes

Merge "First AT91 fixes batch for 3.16" from Nicolas Ferre:

- drivers/misc fix for Kconfig PWM symbol
- correction of several values in DT after conversion to CCF
- fix at91sam9261/at91sam9261ek mistake in slow crystal vs. slow RC osc

* tag 'at91-fixes' of git://github.com/at91linux/linux-at91:
  ARM: at91/dt: sam9261: remove slow RC osc
  ARM: at91/dt: define sam9261ek slow crystal frequency
  ARM: at91/dt: sam9261: correctly define mainck
  ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values
  ARM: at91/dt: sam9x5: correct PLLA ICPLL and OUT values
  misc: atmel_pwm: fix Kconfig symbols
parents 6d12e796 971dc9ce
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+7 −14
Original line number Diff line number Diff line
@@ -568,24 +568,17 @@
				#size-cells = <0>;
				#interrupt-cells = <1>;

				slow_rc_osc: slow_rc_osc {
					compatible = "fixed-clock";
					#clock-cells = <0>;
					clock-frequency = <32768>;
					clock-accuracy = <50000000>;
				};

				clk32k: slck {
					compatible = "atmel,at91sam9260-clk-slow";
				main_osc: main_osc {
					compatible = "atmel,at91rm9200-clk-main-osc";
					#clock-cells = <0>;
					clocks = <&slow_rc_osc &slow_xtal>;
					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
					clocks = <&main_xtal>;
				};

				main: mainck {
					compatible = "atmel,at91rm9200-clk-main";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
					clocks = <&main_xtal>;
					clocks = <&main_osc>;
				};

				plla: pllack {
@@ -615,7 +608,7 @@
					compatible = "atmel,at91rm9200-clk-master";
					#clock-cells = <0>;
					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
					atmel,clk-output-range = <0 94000000>;
					atmel,clk-divisors = <1 2 4 0>;
				};
@@ -632,7 +625,7 @@
					#address-cells = <1>;
					#size-cells = <0>;
					interrupt-parent = <&pmc>;
					clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;

					prog0: prog0 {
						#clock-cells = <0>;
+4 −0
Original line number Diff line number Diff line
@@ -20,6 +20,10 @@
		reg = <0x20000000 0x4000000>;
	};

	slow_xtal {
		clock-frequency = <32768>;
	};

	main_xtal {
		clock-frequency = <18432000>;
	};
+2 −2
Original line number Diff line number Diff line
@@ -132,8 +132,8 @@
								      <595000000 650000000 3 0>,
								      <545000000 600000000 0 1>,
								      <495000000 555000000 1 1>,
								      <445000000 500000000 1 2>,
								      <400000000 450000000 1 3>;
								      <445000000 500000000 2 1>,
								      <400000000 450000000 3 1>;
				};

				plladiv: plladivck {
+2 −2
Original line number Diff line number Diff line
@@ -140,8 +140,8 @@
								       595000000 650000000 3 0
								       545000000 600000000 0 1
								       495000000 555000000 1 1
								       445000000 500000000 1 2
								       400000000 450000000 1 3>;
								       445000000 500000000 2 1
								       400000000 450000000 3 1>;
				};

				plladiv: plladivck {
+1 −1
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ config AD525X_DPOT_SPI
config ATMEL_PWM
	tristate "Atmel AT32/AT91 PWM support"
	depends on HAVE_CLK
	depends on AVR32 || AT91SAM9263 || AT91SAM9RL || AT91SAM9G45
	depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
	help
	  This option enables device driver support for the PWM channels
	  on certain Atmel processors.  Pulse Width Modulation is used for