Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6bea0f6d authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul
Browse files

dmaengine: dw: properly read DWC_PARAMS register



In case we have less than maximum allowed channels (8) and autoconfiguration is
enabled the DWC_PARAMS read is wrong because it uses different arithmetic to
what is needed for channel priority setup.

Re-do the caclulations properly. This now works on AVR32 board well.

Fixes: fed2574b (dw_dmac: introduce software emulation of LLP transfers)
Cc: yitian.bu@tangramtek.com
Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent ee08b59d
Loading
Loading
Loading
Loading
+2 −2
Original line number Original line Diff line number Diff line
@@ -1591,7 +1591,6 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
	INIT_LIST_HEAD(&dw->dma.channels);
	INIT_LIST_HEAD(&dw->dma.channels);
	for (i = 0; i < nr_channels; i++) {
	for (i = 0; i < nr_channels; i++) {
		struct dw_dma_chan	*dwc = &dw->chan[i];
		struct dw_dma_chan	*dwc = &dw->chan[i];
		int			r = nr_channels - i - 1;


		dwc->chan.device = &dw->dma;
		dwc->chan.device = &dw->dma;
		dma_cookie_init(&dwc->chan);
		dma_cookie_init(&dwc->chan);
@@ -1603,7 +1602,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)


		/* 7 is highest priority & 0 is lowest. */
		/* 7 is highest priority & 0 is lowest. */
		if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
		if (pdata->chan_priority == CHAN_PRIORITY_ASCENDING)
			dwc->priority = r;
			dwc->priority = nr_channels - i - 1;
		else
		else
			dwc->priority = i;
			dwc->priority = i;


@@ -1622,6 +1621,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
		/* Hardware configuration */
		/* Hardware configuration */
		if (autocfg) {
		if (autocfg) {
			unsigned int dwc_params;
			unsigned int dwc_params;
			unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1;
			void __iomem *addr = chip->regs + r * sizeof(u32);
			void __iomem *addr = chip->regs + r * sizeof(u32);


			dwc_params = dma_read_byaddr(addr, DWC_PARAMS);
			dwc_params = dma_read_byaddr(addr, DWC_PARAMS);