Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6b6d5626 authored by Robert Beckett's avatar Robert Beckett Committed by Daniel Vetter
Browse files

drm/i915/gen9: WA ST Unit Power Optimization Disable 



WaDisableSTUnitPowerOptimization:skl,bxt

Signed-off-by: default avatarRobert Beckett <robert.beckett@intel.com>
Signed-off-by: default avatarArun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: default avatarSagar Arun Kamble <sagar.a.kamble@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent d7884d69

drivers/gpu/drm/i915/i915_reg.h

+3 −0
Original line number Diff line number Diff line
@@ -6943,6 +6943,9 @@ enum skl_disp_power_wells { 
#define HSW_ROW_CHICKEN3		0xe49c

#define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)



#define HALF_SLICE_CHICKEN2		0xe180

#define   GEN8_ST_PO_DISABLE		(1<<13)



#define HALF_SLICE_CHICKEN3		0xe184

#define   HSW_SAMPLE_C_PERFORMANCE	(1<<9)

#define   GEN8_CENTROID_PIXEL_OPT_DIS	(1<<8)

drivers/gpu/drm/i915/intel_ringbuffer.c

+3 −0
Original line number Diff line number Diff line
@@ -990,6 +990,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) 
				  GEN8_SAMPLER_POWER_BYPASS_DIS);

	}



	/* WaDisableSTUnitPowerOptimization:skl,bxt */

	WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);



	return 0;

}