Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6af002b3 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.19.274 into android-4.19-stable 



Changes in 4.19.274
	wifi: rtl8xxxu: gen2: Turn on the rate control
	powerpc: dts: t208x: Mark MAC1 and MAC2 as 10G
	random: always mix cycle counter in add_latent_entropy()
	can: kvaser_usb: hydra: help gcc-13 to figure out cmd_len
	powerpc: dts: t208x: Disable 10G on MAC1 and MAC2
	alarmtimer: Prevent starvation by small intervals and SIG_IGN
	drm/i915/gvt: fix double free bug in split_2MB_gtt_entry
	mac80211: mesh: embedd mesh_paths and mpp_paths into ieee80211_if_mesh
	uaccess: Add speculation barrier to copy_from_user()
	wifi: mwifiex: Add missing compatible string for SD8787
	ext4: Fix function prototype mismatch for ext4_feat_ktype
	bpf: add missing header file include
	Linux 4.19.274

Change-Id: Ibf649340dee25d21c329d09a1f19454dfd2e5e7f
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
parents 271575bc 2e3d9118

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 19

SUBLEVEL = 273

SUBLEVEL = 274

EXTRAVERSION =

NAME = "People's Front"

arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-2.dtsi

0 → 100644
+44 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later

/*

 * QorIQ FMan v3 10g port #2 device tree stub [ controller @ offset 0x400000 ]

 *

 * Copyright 2022 Sean Anderson <sean.anderson@seco.com>

 * Copyright 2012 - 2015 Freescale Semiconductor Inc.

 */



fman@400000 {

	fman0_rx_0x08: port@88000 {

		cell-index = <0x8>;

		compatible = "fsl,fman-v3-port-rx";

		reg = <0x88000 0x1000>;

		fsl,fman-10g-port;

	};



	fman0_tx_0x28: port@a8000 {

		cell-index = <0x28>;

		compatible = "fsl,fman-v3-port-tx";

		reg = <0xa8000 0x1000>;

		fsl,fman-10g-port;

	};



	ethernet@e0000 {

		cell-index = <0>;

		compatible = "fsl,fman-memac";

		reg = <0xe0000 0x1000>;

		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;

		ptp-timer = <&ptp_timer0>;

		pcsphy-handle = <&pcsphy0>;

	};



	mdio@e1000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";

		reg = <0xe1000 0x1000>;

		fsl,erratum-a011043; /* must ignore read errors */



		pcsphy0: ethernet-phy@0 {

			reg = <0x0>;

		};

	};

};

arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-3.dtsi

0 → 100644
+44 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later

/*

 * QorIQ FMan v3 10g port #3 device tree stub [ controller @ offset 0x400000 ]

 *

 * Copyright 2022 Sean Anderson <sean.anderson@seco.com>

 * Copyright 2012 - 2015 Freescale Semiconductor Inc.

 */



fman@400000 {

	fman0_rx_0x09: port@89000 {

		cell-index = <0x9>;

		compatible = "fsl,fman-v3-port-rx";

		reg = <0x89000 0x1000>;

		fsl,fman-10g-port;

	};



	fman0_tx_0x29: port@a9000 {

		cell-index = <0x29>;

		compatible = "fsl,fman-v3-port-tx";

		reg = <0xa9000 0x1000>;

		fsl,fman-10g-port;

	};



	ethernet@e2000 {

		cell-index = <1>;

		compatible = "fsl,fman-memac";

		reg = <0xe2000 0x1000>;

		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;

		ptp-timer = <&ptp_timer0>;

		pcsphy-handle = <&pcsphy1>;

	};



	mdio@e3000 {

		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";

		reg = <0xe3000 0x1000>;

		fsl,erratum-a011043; /* must ignore read errors */



		pcsphy1: ethernet-phy@0 {

			reg = <0x0>;

		};

	};

};

arch/powerpc/boot/dts/fsl/t2081si-post.dtsi

+18 −2
Original line number Diff line number Diff line
@@ -631,8 +631,8 @@ 
/include/ "qoriq-bman1.dtsi"



/include/ "qoriq-fman3-0.dtsi"

/include/ "qoriq-fman3-0-1g-0.dtsi"

/include/ "qoriq-fman3-0-1g-1.dtsi"

/include/ "qoriq-fman3-0-10g-2.dtsi"

/include/ "qoriq-fman3-0-10g-3.dtsi"

/include/ "qoriq-fman3-0-1g-2.dtsi"

/include/ "qoriq-fman3-0-1g-3.dtsi"

/include/ "qoriq-fman3-0-1g-4.dtsi"
@@ -681,3 +681,19 @@ 
		interrupts = <16 2 1 9>;

	};

};



&fman0_rx_0x08 {

	/delete-property/ fsl,fman-10g-port;

};



&fman0_tx_0x28 {

	/delete-property/ fsl,fman-10g-port;

};



&fman0_rx_0x09 {

	/delete-property/ fsl,fman-10g-port;

};



&fman0_tx_0x29 {

	/delete-property/ fsl,fman-10g-port;

};

drivers/gpu/drm/i915/gvt/gtt.c

+13 −4
Original line number Diff line number Diff line
@@ -1155,10 +1155,8 @@ static int split_2MB_gtt_entry(struct intel_vgpu *vgpu, 
	for_each_shadow_entry(sub_spt, &sub_se, sub_index) {

		ret = intel_gvt_hypervisor_dma_map_guest_page(vgpu,

				start_gfn + sub_index, PAGE_SIZE, &dma_addr);

		if (ret) {

			ppgtt_invalidate_spt(spt);

			return ret;

		}

		if (ret)

			goto err;

		sub_se.val64 = se->val64;



		/* Copy the PAT field from PDE. */
@@ -1177,6 +1175,17 @@ static int split_2MB_gtt_entry(struct intel_vgpu *vgpu, 
	ops->set_pfn(se, sub_spt->shadow_page.mfn);

	ppgtt_set_shadow_entry(spt, se, index);

	return 0;

err:

	/* Cancel the existing addess mappings of DMA addr. */

	for_each_present_shadow_entry(sub_spt, &sub_se, sub_index) {

		gvt_vdbg_mm("invalidate 4K entry\n");

		ppgtt_invalidate_pte(sub_spt, &sub_se);

	}

	/* Release the new allocated spt. */

	trace_spt_change(sub_spt->vgpu->id, "release", sub_spt,

		sub_spt->guest_page.gfn, sub_spt->shadow_page.type);

	ppgtt_free_spt(sub_spt);

	return ret;

}



static int split_64KB_gtt_entry(struct intel_vgpu *vgpu,