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Commit 6a6d55c3 authored by Dave Martin's avatar Dave Martin Committed by Marc Zyngier
Browse files

ARM: virt: Update documentation for hyp mode entry support 



Document the possibility of the kernel being entered in HYP mode.

Signed-off-by: default avatarDave Martin <dave.martin@linaro.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent 424e5994

Documentation/arm/Booting

+21 −1
Original line number Diff line number Diff line
@@ -154,13 +154,33 @@ In either case, the following conditions must be met: 


- CPU mode

  All forms of interrupts must be disabled (IRQs and FIQs)

  The CPU must be in SVC mode.  (A special exception exists for Angel)



  For CPUs which do not include the ARM virtualization extensions, the

  CPU must be in SVC mode.  (A special exception exists for Angel)



  CPUs which include support for the virtualization extensions can be

  entered in HYP mode in order to enable the kernel to make full use of

  these extensions.  This is the recommended boot method for such CPUs,

  unless the virtualisations are already in use by a pre-installed

  hypervisor.



  If the kernel is not entered in HYP mode for any reason, it must be

  entered in SVC mode.



- Caches, MMUs

  The MMU must be off.

  Instruction cache may be on or off.

  Data cache must be off.



  If the kernel is entered in HYP mode, the above requirements apply to

  the HYP mode configuration in addition to the ordinary PL1 (privileged

  kernel modes) configuration.  In addition, all traps into the

  hypervisor must be disabled, and PL1 access must be granted for all

  peripherals and CPU resources for which this is architecturally

  possible.  Except for entering in HYP mode, the system configuration

  should be such that a kernel which does not include support for the

  virtualization extensions can boot correctly without extra help.



- The boot loader is expected to call the kernel image by jumping

  directly to the first instruction of the kernel image.