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Commit 699b477a authored by Thierry Reding's avatar Thierry Reding
Browse files

clk: tegra: Add peripheral registers for bank Y 



Tegra210 has an extra bank of peripheral clock registers. Add it to the
generic peripheral clock code.

Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 5e43e259

drivers/clk/tegra/clk.c

+14 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#define CLK_OUT_ENB_V			0x360

#define CLK_OUT_ENB_W			0x364

#define CLK_OUT_ENB_X			0x280

#define CLK_OUT_ENB_Y			0x298

#define CLK_OUT_ENB_SET_L		0x320

#define CLK_OUT_ENB_CLR_L		0x324

#define CLK_OUT_ENB_SET_H		0x328
@@ -42,6 +43,8 @@ 
#define CLK_OUT_ENB_CLR_W		0x44c

#define CLK_OUT_ENB_SET_X		0x284

#define CLK_OUT_ENB_CLR_X		0x288

#define CLK_OUT_ENB_SET_Y		0x29c

#define CLK_OUT_ENB_CLR_Y		0x2a0



#define RST_DEVICES_L			0x004

#define RST_DEVICES_H			0x008
@@ -50,6 +53,7 @@ 
#define RST_DEVICES_V			0x358

#define RST_DEVICES_W			0x35C

#define RST_DEVICES_X			0x28C

#define RST_DEVICES_Y			0x2a4

#define RST_DEVICES_SET_L		0x300

#define RST_DEVICES_CLR_L		0x304

#define RST_DEVICES_SET_H		0x308
@@ -62,6 +66,8 @@ 
#define RST_DEVICES_CLR_W		0x43c

#define RST_DEVICES_SET_X		0x290

#define RST_DEVICES_CLR_X		0x294

#define RST_DEVICES_SET_Y		0x2a8

#define RST_DEVICES_CLR_Y		0x2ac



/* Global data of Tegra CPU CAR ops */

static struct tegra_cpu_car_ops dummy_car_ops;
@@ -122,6 +128,14 @@ static struct tegra_clk_periph_regs periph_regs[] = { 
		.rst_set_reg = RST_DEVICES_SET_X,

		.rst_clr_reg = RST_DEVICES_CLR_X,

	},

	[6] = {

		.enb_reg = CLK_OUT_ENB_Y,

		.enb_set_reg = CLK_OUT_ENB_SET_Y,

		.enb_clr_reg = CLK_OUT_ENB_CLR_Y,

		.rst_reg = RST_DEVICES_Y,

		.rst_set_reg = RST_DEVICES_SET_Y,

		.rst_clr_reg = RST_DEVICES_CLR_Y,

	},

};



static void __iomem *clk_base;