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Commit 697d310f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'for-arm-soc' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next/cleanup

Merge cleanups from Russell King:

* 'for-arm-soc' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
  ARM: Show proper respect for Heinrich Hertz by using the correct unit for frequency
parents d7c82daf 6a53bc75
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+1 −1
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@
	broken-cd;
	bypass-smu;
	cap-mmc-highspeed;
	supports-hs200-mode; /* 200 Mhz */
	supports-hs200-mode; /* 200 MHz */
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <0 4>;
+1 −1
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@

	otg_drv_vbus: pinmux_otg_drv_vbus {
		pinctrl-single,pins = <
			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50Mhz_clk.usb0_drvvbus */
			OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50MHz_clk.usb0_drvvbus */
		>;
	};

+1 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ extern void __iomem *da8xx_syscfg1_base;

/*
 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
 * (than the regular 300Mhz variant), the board code should set this up
 * (than the regular 300MHz variant), the board code should set this up
 * with the supported speed before calling da850_register_cpufreq().
 */
extern unsigned int da850_max_speed;
+2 −2
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
	clks[IMX6SX_CLK_USBPHY1_GATE] = imx_clk_gate("usbphy1_gate", "dummy", base + 0x10, 6);
	clks[IMX6SX_CLK_USBPHY2_GATE] = imx_clk_gate("usbphy2_gate", "dummy", base + 0x20, 6);

	/* FIXME 100Mhz is used for pcie ref for all imx6 pcie, excepted imx6q */
	/* FIXME 100MHz is used for pcie ref for all imx6 pcie, excepted imx6q */
	clks[IMX6SX_CLK_PCIE_REF] = imx_clk_fixed_factor("pcie_ref", "pll6_enet", 1, 5);
	clks[IMX6SX_CLK_PCIE_REF_125M] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19);

@@ -520,7 +520,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
		pr_err("Failed to set pcie parent clk.\n");

	/*
	 * Init enet system AHB clock, set to 200Mhz
	 * Init enet system AHB clock, set to 200MHz
	 * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB
	 */
	clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]);
+1 −1
Original line number Diff line number Diff line
@@ -42,7 +42,7 @@ static inline unsigned long iop13xx_core_freq(void)
	case IOP13XX_CORE_FREQ_1200:
		return 1200000000;
	default:
		printk("%s: warning unknown frequency, defaulting to 800Mhz\n",
		printk("%s: warning unknown frequency, defaulting to 800MHz\n",
			__func__);
	}

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