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Commit 68ac6ec3 authored by Tony Lijo Jose's avatar Tony Lijo Jose
Browse files

ARM: dts: msm: Fix svs clock level for bengal 

- Svs clock level for phy_rx clock src in bengal target is 240Mhz

CRs-Fixed: 2562040
Change-Id: I933d9af831916196dfacec0689983abf63b2a165
parent ff074340

bengal-camera.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ 
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

		clock-rates =

			<19200000  0 19200000 0>,

			<341330000 0 200000000 0>,

			<240000000 0 200000000 0>,

			<341330000 0 200000000 0>,

			<384000000 0 268800000 0>;

		status = "ok";
@@ -60,7 +60,7 @@ 
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

		clock-rates =

			<19200000  0 19200000 0>,

			<341330000 0 200000000 0>,

			<240000000 0 200000000 0>,

			<341330000 0 200000000 0>,

			<384000000 0 268800000 0>;

		status = "ok";
@@ -90,7 +90,7 @@ 
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";

		clock-rates =

			<19200000  0 19200000 0>,

			<341330000 0 200000000 0>,

			<240000000 0 200000000 0>,

			<341330000 0 200000000 0>,

			<384000000 0 268800000 0>;

		status = "ok";