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Commit 6724a2f4 authored by Olivier Grenie's avatar Olivier Grenie Committed by Mauro Carvalho Chehab
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[media] dib7090: add the reference board TFE7090E



The intend of this patch is to add the support for the DiBcom reference
board TFE7090E.

Signed-off-by: default avatarOlivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: default avatarPatrick Boettcher <patrick.boettcher@dibcom.fr>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 2e802861
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+194 −2
Original line number Diff line number Diff line
@@ -1518,7 +1518,7 @@ static int dib8096_set_param_override(struct dvb_frontend *fe,
	if (ret < 0)
		return ret;

	target = (dib0090_get_wbd_offset(fe) * 8 * 18 / 33 + 1) / 2;
	target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
	dib8000_set_wbd_ref(fe, target);


@@ -2079,7 +2079,7 @@ static int dib7090_agc_startup(struct dvb_frontend *fe, struct dvb_frontend_para

	memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
	dib0090_pwm_gain_reset(fe);
	target = (dib0090_get_wbd_offset(fe) * 8 + 1) / 2;
	target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
	dib7000p_set_wbd_ref(fe, target);

	if (dib7090p_get_best_sampling(fe, &adc) == 0) {
@@ -2100,6 +2100,41 @@ static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
	return 0;
}

static int dib7090e_update_lna(struct dvb_frontend *fe, u16 agc_global)
{
	u16 agc1 = 0, agc2, wbd = 0, wbd_target, wbd_offset, threshold_agc1;
	s16 wbd_delta;

	if ((fe->dtv_property_cache.frequency) < 400000000)
		threshold_agc1 = 25000;
	else
		threshold_agc1 = 30000;

	wbd_target = (dib0090_get_wbd_target(fe)*8+1)/2;
	wbd_offset = dib0090_get_wbd_offset(fe);
	dib7000p_get_agc_values(fe, NULL, &agc1, &agc2, &wbd);
	wbd_delta = (s16)wbd - (((s16)wbd_offset+10)*4) ;

	deb_info("update lna, agc_global=%d agc1=%d agc2=%d",
			agc_global, agc1, agc2);
	deb_info("update lna, wbd=%d wbd target=%d wbd offset=%d wbd delta=%d",
			wbd, wbd_target, wbd_offset, wbd_delta);

	if ((agc1 < threshold_agc1) && (wbd_delta > 0)) {
		dib0090_set_switch(fe, 1, 1, 1);
		dib0090_set_vga(fe, 0);
		dib0090_update_rframp_7090(fe, 0);
		dib0090_update_tuning_table_7090(fe, 0);
	} else {
		dib0090_set_vga(fe, 1);
		dib0090_update_rframp_7090(fe, 1);
		dib0090_update_tuning_table_7090(fe, 1);
		dib0090_set_switch(fe, 0, 0, 0);
	}

	return 0;
}

static struct dib0090_wbd_slope dib7090_wbd_table[] = {
	{ 380,   81, 850, 64, 540,  4},
	{ 860,   51, 866, 21,  375, 4},
@@ -2108,6 +2143,15 @@ static struct dib0090_wbd_slope dib7090_wbd_table[] = {
	{ 0xFFFF, 0,   0, 0,   0,   0},
};

static struct dib0090_wbd_slope dib7090e_wbd_table[] = {
	{ 380,   81, 850, 64, 540,	4},
	{ 700,   51, 866, 21,  320,	4},
	{ 860,   48, 666, 18,  330,	6},
	{1700,    0, 250, 0,   100, 6},
	{2600,    0, 250, 0,   100, 6},
	{ 0xFFFF, 0,   0, 0,   0,	0},
};

struct dibx000_agc_config dib7090_agc_config[2] = {
	{
		.band_caps      = BAND_UHF,
@@ -2286,6 +2330,34 @@ static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
	}
};

static struct dib7000p_config tfe7090e_dib7000p_config = {
	.output_mpeg2_in_188_bytes  = 1,
	.hostbus_diversity			= 1,
	.tuner_is_baseband			= 1,
	.update_lna					= dib7090e_update_lna,

	.agc_config_count			= 2,
	.agc						= dib7090_agc_config,

	.bw							= &dib7090_clock_config_12_mhz,

	.gpio_dir					= DIB7000P_GPIO_DEFAULT_DIRECTIONS,
	.gpio_val					= DIB7000P_GPIO_DEFAULT_VALUES,
	.gpio_pwm_pos				= DIB7000P_GPIO_DEFAULT_PWM_POS,

	.pwm_freq_div				= 0,

	.agc_control				= dib7090_agc_restart,

	.spur_protect				= 0,
	.disable_sample_and_hold	= 0,
	.enable_current_mirror		= 0,
	.diversity_delay			= 0,

	.output_mode				= OUTMODE_MPEG2_FIFO,
	.enMpegOutput				= 1,
};

static const struct dib0090_config nim7090_dib0090_config = {
	.io.clock_khz = 12000,
	.io.pll_bypass = 0,
@@ -2320,6 +2392,42 @@ static const struct dib0090_config nim7090_dib0090_config = {
	.in_soc = 1,
};

static const struct dib0090_config tfe7090e_dib0090_config = {
	.io.clock_khz = 12000,
	.io.pll_bypass = 0,
	.io.pll_range = 0,
	.io.pll_prediv = 3,
	.io.pll_loopdiv = 6,
	.io.adc_clock_ratio = 0,
	.io.pll_int_loop_filt = 0,
	.reset = dib7090_tuner_sleep,
	.sleep = dib7090_tuner_sleep,

	.freq_offset_khz_uhf = 0,
	.freq_offset_khz_vhf = 0,

	.get_adc_power = dib7090_get_adc_power,

	.clkouttobamse = 1,
	.analog_output = 0,

	.wbd_vhf_offset = 0,
	.wbd_cband_offset = 0,
	.use_pwm_agc = 1,
	.clkoutdrive = 0,

	.fref_clock_ratio = 0,

	.wbd = dib7090e_wbd_table,

	.ls_cfg_pad_drv = 0,
	.data_tx_drv = 0,
	.low_if = NULL,
	.in_soc = 1,
	.force_cband_input = 1,
	.is_dib7090e = 1,
};

static const struct dib0090_config tfe7090pvr_dib0090_config[2] = {
	{
		.io.clock_khz = 12000,
@@ -2512,6 +2620,49 @@ static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
	return 0;
}

static int tfe7090e_frontend_attach(struct dvb_usb_adapter *adap)
{
	dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
	dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
	dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);

	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
	msleep(20);
	dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);

	if (dib7000p_i2c_enumeration(&adap->dev->i2c_adap,
				1, 0x10, &tfe7090e_dib7000p_config) != 0) {
		err("%s: dib7000p_i2c_enumeration failed.  Cannot continue\n",
				__func__);
		return -ENODEV;
	}
	adap->fe_adap[0].fe = dvb_attach(dib7000p_attach, &adap->dev->i2c_adap,
			0x80, &tfe7090e_dib7000p_config);

	return adap->fe_adap[0].fe == NULL ?  -ENODEV : 0;
}

static int tfe7090e_tuner_attach(struct dvb_usb_adapter *adap)
{
	struct dib0700_adapter_state *st = adap->priv;
	struct i2c_adapter *tun_i2c =
		dib7090_get_i2c_tuner(adap->fe_adap[0].fe);

	if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
				&tfe7090e_dib0090_config) == NULL)
		return -ENODEV;

	dib7000p_set_gpio(adap->fe_adap[0].fe, 8, 0, 1);

	st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
	adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
	return 0;
}

/* STK7070PD */
static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
	{
@@ -2968,6 +3119,7 @@ struct usb_device_id dib0700_usb_id_table[] = {
/* 75 */{ USB_DEVICE(USB_VID_MEDION,    USB_PID_CREATIX_CTX1921) },
	{ USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV340E) },
	{ USB_DEVICE(USB_VID_PINNACLE,  USB_PID_PINNACLE_PCTV340E_SE) },
	{ USB_DEVICE(USB_VID_DIBCOM,    USB_PID_DIBCOM_TFE7090E) },
	{ 0 }		/* Terminating entry */
};
MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
@@ -4023,6 +4175,46 @@ struct dvb_usb_device_properties dib0700_devices[] = {
				{ NULL },
			},
		},
		.rc.core = {
			.rc_interval      = DEFAULT_RC_INTERVAL,
			.rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
			.module_name	  = "dib0700",
			.rc_query         = dib0700_rc_query_old_firmware,
			.allowed_protos   = RC_TYPE_RC5 |
					    RC_TYPE_RC6 |
					    RC_TYPE_NEC,
			.change_protocol  = dib0700_change_protocol,
		},
	}, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
		.num_adapters = 1,
		.adapter = {
			{
				.num_frontends = 1,
				.fe = {{
					.caps  = DVB_USB_ADAP_HAS_PID_FILTER |
						DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
					.pid_filter_count = 32,
					.pid_filter = stk70x0p_pid_filter,
					.pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
					.frontend_attach  = tfe7090e_frontend_attach,
					.tuner_attach     = tfe7090e_tuner_attach,

					DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
				} },

				.size_of_priv =
					sizeof(struct dib0700_adapter_state),
			},
		},

		.num_device_descs = 1,
		.devices = {
			{   "DiBcom TFE7090E reference design",
				{ &dib0700_usb_id_table[78], NULL },
				{ NULL },
			},
		},

		.rc.core = {
			.rc_interval      = DEFAULT_RC_INTERVAL,
			.rc_codes         = RC_MAP_DIB0700_RC5_TABLE,
+1 −0
Original line number Diff line number Diff line
@@ -113,6 +113,7 @@
#define USB_PID_DIBCOM_STK7770P				0x1e80
#define USB_PID_DIBCOM_NIM7090				0x1bb2
#define USB_PID_DIBCOM_TFE7090PVR			0x1bb4
#define USB_PID_DIBCOM_TFE7090E				0x1bb7
#define USB_PID_DIBCOM_NIM9090M				0x2383
#define USB_PID_DIBCOM_NIM9090MD			0x2384
#define USB_PID_DPOSH_M9206_COLD			0x9206
+141 −5
Original line number Diff line number Diff line
@@ -717,6 +717,34 @@ static const u16 rf_ramp_pwm_cband_7090[] = {
	(0 << 10) | 109,	/* RF_RAMP4, LNA 4 */
};

static const uint16_t rf_ramp_pwm_cband_7090e_sensitivity[] = {
	186,
	40,
	746,
	(10 << 10) | 345,
	(0  << 10) | 746,
	(0 << 10) | 0,
	(0  << 10) | 0,
	(28 << 10) | 200,
	(0  << 10) | 345,
	(20 << 10) | 0,
	(0  << 10) | 200,
};

static const uint16_t rf_ramp_pwm_cband_7090e_aci[] = {
	86,
	40,
	345,
	(0 << 10) | 0,
	(0 << 10) | 0,
	(0 << 10) | 0,
	(0 << 10) | 0,
	(28 << 10) | 200,
	(0  << 10) | 345,
	(20 << 10) | 0,
	(0  << 10) | 200,
};

static const u16 rf_ramp_pwm_cband_8090[] = {
	345,			/* max RF gain in 10th of dB */
	29,			/* ramp_slope = 1dB of gain -> clock_ticks_per_db = clk_khz / ramp_slope -> RF_RAMP2 */
@@ -1076,8 +1104,16 @@ void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
				dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal_socs);
				if (state->identity.version == SOC_8090_P1G_11R1 || state->identity.version == SOC_8090_P1G_21R1)
					dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_8090);
				else if (state->identity.version == SOC_7090_P1G_11R1 || state->identity.version == SOC_7090_P1G_21R1)
				else if (state->identity.version == SOC_7090_P1G_11R1
						|| state->identity.version == SOC_7090_P1G_21R1) {
					if (state->config->is_dib7090e) {
						if (state->rf_ramp == NULL)
							dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090e_sensitivity);
						else
							dib0090_set_rframp_pwm(state, state->rf_ramp);
					} else
						dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband_7090);
				}
			} else {
				dib0090_set_rframp_pwm(state, rf_ramp_pwm_cband);
				dib0090_set_bbramp_pwm(state, bb_ramp_pwm_normal);
@@ -1313,7 +1349,7 @@ void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 *

EXPORT_SYMBOL(dib0090_get_current_gain);

u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
u16 dib0090_get_wbd_target(struct dvb_frontend *fe)
{
	struct dib0090_state *state = fe->tuner_priv;
	u32 f_MHz = state->fe->dtv_property_cache.frequency / 1000000;
@@ -1350,9 +1386,57 @@ u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)

	return state->wbd_offset + wbd_tcold;
}
EXPORT_SYMBOL(dib0090_get_wbd_target);

u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
{
	struct dib0090_state *state = fe->tuner_priv;
	return state->wbd_offset;
}
EXPORT_SYMBOL(dib0090_get_wbd_offset);

int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3)
{
	struct dib0090_state *state = fe->tuner_priv;

	dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xfff8)
			| ((sw3 & 1) << 2) | ((sw2 & 1) << 1) | (sw1 & 1));

	return 0;
}
EXPORT_SYMBOL(dib0090_set_switch);

int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff)
{
	struct dib0090_state *state = fe->tuner_priv;

	dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x7fff)
			| ((onoff & 1) << 15));
	return 0;
}
EXPORT_SYMBOL(dib0090_set_vga);

int dib0090_update_rframp_7090(struct dvb_frontend *fe, u8 cfg_sensitivity)
{
	struct dib0090_state *state = fe->tuner_priv;

	if ((!state->identity.p1g) || (!state->identity.in_soc)
			|| ((state->identity.version != SOC_7090_P1G_21R1)
				&& (state->identity.version != SOC_7090_P1G_11R1))) {
		dprintk("%s() function can only be used for dib7090P", __func__);
		return -ENODEV;
	}

	if (cfg_sensitivity)
		state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_sensitivity;
	else
		state->rf_ramp = (const u16 *)&rf_ramp_pwm_cband_7090e_aci;
	dib0090_pwm_gain_reset(fe);

	return 0;
}
EXPORT_SYMBOL(dib0090_update_rframp_7090);

static const u16 dib0090_defaults[] = {

	25, 0x01,
@@ -1962,6 +2046,52 @@ static const struct dib0090_tuning dib0090_tuning_table_cband_7090[] = {
#endif
};

static const struct dib0090_tuning dib0090_tuning_table_cband_7090e_sensitivity[] = {
#ifdef CONFIG_BAND_CBAND
	{ 300000,  0 ,  3,  0x8105, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
	{ 380000,  0 ,  10, 0x810F, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
	{ 600000,  0 ,  10, 0x815E, 0x280, 0x2d12, 0xb84e, EN_CAB },
	{ 660000,  0 ,  5,  0x85E3, 0x280, 0x2d12, 0xb84e, EN_CAB },
	{ 720000,  0 ,  5,  0x852E, 0x280, 0x2d12, 0xb84e, EN_CAB },
	{ 860000,  0 ,  4,  0x85E5, 0x280, 0x2d12, 0xb84e, EN_CAB },
#endif
};

int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
		u8 cfg_sensitivity)
{
	struct dib0090_state *state = fe->tuner_priv;
	const struct dib0090_tuning *tune =
		dib0090_tuning_table_cband_7090e_sensitivity;
	const struct dib0090_tuning dib0090_tuning_table_cband_7090e_aci[] = {
		{ 300000,  0 ,  3,  0x8165, 0x2c0, 0x2d12, 0xb84e, EN_CAB },
		{ 650000,  0 ,  4,  0x815B, 0x280, 0x2d12, 0xb84e, EN_CAB },
		{ 860000,  0 ,  5,  0x84EF, 0x280, 0x2d12, 0xb84e, EN_CAB },
	};

	if ((!state->identity.p1g) || (!state->identity.in_soc)
			|| ((state->identity.version != SOC_7090_P1G_21R1)
				&& (state->identity.version != SOC_7090_P1G_11R1))) {
		dprintk("%s() function can only be used for dib7090", __func__);
		return -ENODEV;
	}

	if (cfg_sensitivity)
		tune = dib0090_tuning_table_cband_7090e_sensitivity;
	else
		tune = dib0090_tuning_table_cband_7090e_aci;

	while (state->rf_request > tune->max_freq)
		tune++;

	dib0090_write_reg(state, 0x09, (dib0090_read_reg(state, 0x09) & 0x8000)
			| (tune->lna_bias & 0x7fff));
	dib0090_write_reg(state, 0x0b, (dib0090_read_reg(state, 0x0b) & 0xf83f)
			| ((tune->lna_tune << 6) & 0x07c0));
	return 0;
}
EXPORT_SYMBOL(dib0090_update_tuning_table_7090);

static int dib0090_captrim_search(struct dib0090_state *state, enum frontend_tune_state *tune_state)
{
	int ret = 0;
@@ -2210,11 +2340,17 @@ static int dib0090_tune(struct dvb_frontend *fe)
					if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF
							|| state->current_band & BAND_UHF) {
						state->current_band = BAND_CBAND;
						if (state->config->is_dib7090e)
							tune = dib0090_tuning_table_cband_7090e_sensitivity;
						else
							tune = dib0090_tuning_table_cband_7090;
					}
				} else {	/* Use the CBAND input for all band under UHF */
					if (state->current_band & BAND_CBAND || state->current_band & BAND_FM || state->current_band & BAND_VHF) {
						state->current_band = BAND_CBAND;
						if (state->config->is_dib7090e)
							tune = dib0090_tuning_table_cband_7090e_sensitivity;
						else
							tune = dib0090_tuning_table_cband_7090;
					}
				}
+43 −3
Original line number Diff line number Diff line
@@ -80,14 +80,21 @@ extern struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c
extern struct dvb_frontend *dib0090_fw_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config);
extern void dib0090_dcc_freq(struct dvb_frontend *fe, u8 fast);
extern void dib0090_pwm_gain_reset(struct dvb_frontend *fe);
extern u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner);
extern u16 dib0090_get_wbd_target(struct dvb_frontend *tuner);
extern u16 dib0090_get_wbd_offset(struct dvb_frontend *fe);
extern int dib0090_gain_control(struct dvb_frontend *fe);
extern enum frontend_tune_state dib0090_get_tune_state(struct dvb_frontend *fe);
extern int dib0090_set_tune_state(struct dvb_frontend *fe, enum frontend_tune_state tune_state);
extern void dib0090_get_current_gain(struct dvb_frontend *fe, u16 * rf, u16 * bb, u16 * rf_gain_limit, u16 * rflt);
extern void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cutoff);
extern int dib0090_set_switch(struct dvb_frontend *fe, u8 sw1, u8 sw2, u8 sw3);
extern int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff);
extern int dib0090_update_rframp_7090(struct dvb_frontend *fe,
		u8 cfg_sensitivity);
extern int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
		u8 cfg_sensitivity);
#else
static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0090_config *config)
static inline struct dvb_frontend *dib0090_register(struct dvb_frontend *fe, struct i2c_adapter *i2c, const struct dib0090_config *config)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return NULL;
@@ -109,7 +116,13 @@ static inline void dib0090_pwm_gain_reset(struct dvb_frontend *fe)
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
}

static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *tuner)
static inline u16 dib0090_get_wbd_target(struct dvb_frontend *tuner)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return 0;
}

static inline u16 dib0090_get_wbd_offset(struct dvb_frontend *fe)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return 0;
@@ -142,6 +155,33 @@ static inline void dib0090_set_dc_servo(struct dvb_frontend *fe, u8 DC_servo_cut
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
}

static inline int dib0090_set_switch(struct dvb_frontend *fe,
		u8 sw1, u8 sw2, u8 sw3)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return -ENODEV;
}

static inline int dib0090_set_vga(struct dvb_frontend *fe, u8 onoff)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return -ENODEV;
}

static inline int dib0090_update_rframp_7090(struct dvb_frontend *fe,
		u8 cfg_sensitivity)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return -ENODEV;
}

static inline int dib0090_update_tuning_table_7090(struct dvb_frontend *fe,
		u8 cfg_sensitivity)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return -ENODEV;
}
#endif

#endif
+18 −0
Original line number Diff line number Diff line
@@ -418,6 +418,24 @@ int dib7000p_set_wbd_ref(struct dvb_frontend *demod, u16 value)
}
EXPORT_SYMBOL(dib7000p_set_wbd_ref);

int dib7000p_get_agc_values(struct dvb_frontend *fe,
		u16 *agc_global, u16 *agc1, u16 *agc2, u16 *wbd)
{
	struct dib7000p_state *state = fe->demodulator_priv;

	if (agc_global != NULL)
		*agc_global = dib7000p_read_word(state, 394);
	if (agc1 != NULL)
		*agc1 = dib7000p_read_word(state, 392);
	if (agc2 != NULL)
		*agc2 = dib7000p_read_word(state, 393);
	if (wbd != NULL)
		*wbd = dib7000p_read_word(state, 397);

	return 0;
}
EXPORT_SYMBOL(dib7000p_get_agc_values);

static void dib7000p_reset_pll(struct dib7000p_state *state)
{
	struct dibx000_bandwidth_config *bw = &state->cfg.bw[0];
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