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Commit 670431ea authored by Jinbum Park's avatar Jinbum Park Committed by Russell King
Browse files

ARM: 8733/1: hw_breakpoint: Mark variables as __ro_after_init 



core_num_brps, core_num_wrps, debug_arch, has_ossr,
max_watchpoint_len are setup once while init stage,
and never changed after that.
so it is good candidate for __ro_after_init.

Reviewed-by: default avatarKees Cook <keescook@chromium.org>
Signed-off-by: default avatarJinbum Park <jinb.park7@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
parent 7710cc69

arch/arm/kernel/hw_breakpoint.c

+5 −5
Original line number Diff line number Diff line
@@ -44,17 +44,17 @@ static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[ARM_MAX_BRP]); 
static DEFINE_PER_CPU(struct perf_event *, wp_on_reg[ARM_MAX_WRP]);



/* Number of BRP/WRP registers on this CPU. */

static int core_num_brps;

static int core_num_wrps;

static int core_num_brps __ro_after_init;

static int core_num_wrps __ro_after_init;



/* Debug architecture version. */

static u8 debug_arch;

static u8 debug_arch __ro_after_init;



/* Does debug architecture support OS Save and Restore? */

static bool has_ossr;

static bool has_ossr __ro_after_init;



/* Maximum supported watchpoint length. */

static u8 max_watchpoint_len;

static u8 max_watchpoint_len __ro_after_init;



#define READ_WB_REG_CASE(OP2, M, VAL)			\

	case ((OP2 << 4) + M):				\