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Commit 666fbcf5 authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Mika Kuoppala
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drm/i915: Don't program eLLC IDI hash mask for gen9+ 



For gen9 onwards, eDRAM is a true memory side cache. So
there is no need to program idi hash mask as it is for eLLC
only.

v2: INTEL_GEN (Chris), s/has/hash (Matthew)

Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
parent 3cb26e26

drivers/gpu/drm/i915/i915_gem.c

+1 −1
Original line number Diff line number Diff line
@@ -4892,7 +4892,7 @@ i915_gem_init_hw(struct drm_device *dev) 
	/* Double layer security blanket, see i915_gem_init() */

	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);



	if (dev_priv->ellc_size)

	if (dev_priv->ellc_size && INTEL_GEN(dev_priv) < 9)

		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));



	if (IS_HASWELL(dev))