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Commit 660da7c9 authored by Andy Lutomirski's avatar Andy Lutomirski Committed by Ingo Molnar
Browse files

x86/mm: Enable CR4.PCIDE on supported systems 



We can use PCID if the CPU has PCID and PGE and we're not on Xen.

By itself, this has no effect. A followup patch will start using PCID.

Signed-off-by: default avatarAndy Lutomirski <luto@kernel.org>
Reviewed-by: default avatarNadav Amit <nadav.amit@gmail.com>
Reviewed-by: default avatarBoris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/6327ecd907b32f79d5aa0d466f04503bbec5df88.1498751203.git.luto@kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 0790c9aa

arch/x86/include/asm/tlbflush.h

+8 −0
Original line number Diff line number Diff line
@@ -243,6 +243,14 @@ static inline void __flush_tlb_all(void) 
		__flush_tlb_global();

	else

		__flush_tlb();



	/*

	 * Note: if we somehow had PCID but not PGE, then this wouldn't work --

	 * we'd end up flushing kernel translations for the current ASID but

	 * we might fail to flush kernel translations for other cached ASIDs.

	 *

	 * To avoid this issue, we force PCID off if PGE is off.

	 */

}



static inline void __flush_tlb_one(unsigned long addr)

arch/x86/kernel/cpu/common.c

+22 −0
Original line number Diff line number Diff line
@@ -329,6 +329,25 @@ static __always_inline void setup_smap(struct cpuinfo_x86 *c) 
	}

}



static void setup_pcid(struct cpuinfo_x86 *c)

{

	if (cpu_has(c, X86_FEATURE_PCID)) {

		if (cpu_has(c, X86_FEATURE_PGE)) {

			cr4_set_bits(X86_CR4_PCIDE);

		} else {

			/*

			 * flush_tlb_all(), as currently implemented, won't

			 * work if PCID is on but PGE is not.  Since that

			 * combination doesn't exist on real hardware, there's

			 * no reason to try to fully support it, but it's

			 * polite to avoid corrupting data if we're on

			 * an improperly configured VM.

			 */

			clear_cpu_cap(c, X86_FEATURE_PCID);

		}

	}

}



/*

 * Protection Keys are not available in 32-bit mode.

 */
@@ -1143,6 +1162,9 @@ static void identify_cpu(struct cpuinfo_x86 *c) 
	setup_smep(c);

	setup_smap(c);



	/* Set up PCID */

	setup_pcid(c);



	/*

	 * The vendor-specific functions might have changed features.

	 * Now we do "generic changes."

arch/x86/xen/enlighten_pv.c

+6 −0
Original line number Diff line number Diff line
@@ -295,6 +295,12 @@ static void __init xen_init_capabilities(void) 
	setup_clear_cpu_cap(X86_FEATURE_ACC);

	setup_clear_cpu_cap(X86_FEATURE_X2APIC);



	/*

	 * Xen PV would need some work to support PCID: CR3 handling as well

	 * as xen_flush_tlb_others() would need updating.

	 */

	setup_clear_cpu_cap(X86_FEATURE_PCID);



	if (!xen_initial_domain())

		setup_clear_cpu_cap(X86_FEATURE_ACPI);