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Commit 653aa464 authored by Sugar Zhang's avatar Sugar Zhang Committed by Mark Brown
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ASoC: rt5640: Correct the digital interface data select 



this patch corrects the interface adc/dac control register definition
according to datasheet.

Signed-off-by: default avatarSugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
parent d4a6360f

sound/soc/codecs/rt5640.c

+1 −1
Original line number Diff line number Diff line
@@ -359,7 +359,7 @@ static const DECLARE_TLV_DB_RANGE(bst_tlv, 


/* Interface data select */

static const char * const rt5640_data_select[] = {

	"Normal", "left copy to right", "right copy to left", "Swap"};

	"Normal", "Swap", "left copy to right", "right copy to left"};



static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,

			    RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);

sound/soc/codecs/rt5640.h

+18 −18
Original line number Diff line number Diff line
@@ -443,39 +443,39 @@ 
#define RT5640_IF1_DAC_SEL_MASK			(0x3 << 14)

#define RT5640_IF1_DAC_SEL_SFT			14

#define RT5640_IF1_DAC_SEL_NOR			(0x0 << 14)

#define RT5640_IF1_DAC_SEL_L2R			(0x1 << 14)

#define RT5640_IF1_DAC_SEL_R2L			(0x2 << 14)

#define RT5640_IF1_DAC_SEL_SWAP			(0x3 << 14)

#define RT5640_IF1_DAC_SEL_SWAP			(0x1 << 14)

#define RT5640_IF1_DAC_SEL_L2R			(0x2 << 14)

#define RT5640_IF1_DAC_SEL_R2L			(0x3 << 14)

#define RT5640_IF1_ADC_SEL_MASK			(0x3 << 12)

#define RT5640_IF1_ADC_SEL_SFT			12

#define RT5640_IF1_ADC_SEL_NOR			(0x0 << 12)

#define RT5640_IF1_ADC_SEL_L2R			(0x1 << 12)

#define RT5640_IF1_ADC_SEL_R2L			(0x2 << 12)

#define RT5640_IF1_ADC_SEL_SWAP			(0x3 << 12)

#define RT5640_IF1_ADC_SEL_SWAP			(0x1 << 12)

#define RT5640_IF1_ADC_SEL_L2R			(0x2 << 12)

#define RT5640_IF1_ADC_SEL_R2L			(0x3 << 12)

#define RT5640_IF2_DAC_SEL_MASK			(0x3 << 10)

#define RT5640_IF2_DAC_SEL_SFT			10

#define RT5640_IF2_DAC_SEL_NOR			(0x0 << 10)

#define RT5640_IF2_DAC_SEL_L2R			(0x1 << 10)

#define RT5640_IF2_DAC_SEL_R2L			(0x2 << 10)

#define RT5640_IF2_DAC_SEL_SWAP			(0x3 << 10)

#define RT5640_IF2_DAC_SEL_SWAP			(0x1 << 10)

#define RT5640_IF2_DAC_SEL_L2R			(0x2 << 10)

#define RT5640_IF2_DAC_SEL_R2L			(0x3 << 10)

#define RT5640_IF2_ADC_SEL_MASK			(0x3 << 8)

#define RT5640_IF2_ADC_SEL_SFT			8

#define RT5640_IF2_ADC_SEL_NOR			(0x0 << 8)

#define RT5640_IF2_ADC_SEL_L2R			(0x1 << 8)

#define RT5640_IF2_ADC_SEL_R2L			(0x2 << 8)

#define RT5640_IF2_ADC_SEL_SWAP			(0x3 << 8)

#define RT5640_IF2_ADC_SEL_SWAP			(0x1 << 8)

#define RT5640_IF2_ADC_SEL_L2R			(0x2 << 8)

#define RT5640_IF2_ADC_SEL_R2L			(0x3 << 8)

#define RT5640_IF3_DAC_SEL_MASK			(0x3 << 6)

#define RT5640_IF3_DAC_SEL_SFT			6

#define RT5640_IF3_DAC_SEL_NOR			(0x0 << 6)

#define RT5640_IF3_DAC_SEL_L2R			(0x1 << 6)

#define RT5640_IF3_DAC_SEL_R2L			(0x2 << 6)

#define RT5640_IF3_DAC_SEL_SWAP			(0x3 << 6)

#define RT5640_IF3_DAC_SEL_SWAP			(0x1 << 6)

#define RT5640_IF3_DAC_SEL_L2R			(0x2 << 6)

#define RT5640_IF3_DAC_SEL_R2L			(0x3 << 6)

#define RT5640_IF3_ADC_SEL_MASK			(0x3 << 4)

#define RT5640_IF3_ADC_SEL_SFT			4

#define RT5640_IF3_ADC_SEL_NOR			(0x0 << 4)

#define RT5640_IF3_ADC_SEL_L2R			(0x1 << 4)

#define RT5640_IF3_ADC_SEL_R2L			(0x2 << 4)

#define RT5640_IF3_ADC_SEL_SWAP			(0x3 << 4)

#define RT5640_IF3_ADC_SEL_SWAP			(0x1 << 4)

#define RT5640_IF3_ADC_SEL_L2R			(0x2 << 4)

#define RT5640_IF3_ADC_SEL_R2L			(0x3 << 4)



/* REC Left Mixer Control 1 (0x3b) */

#define RT5640_G_HP_L_RM_L_MASK			(0x7 << 13)