Commit 64ff64b9 authored Mar 10, 2017 by Shivasharan S Committed by Martin K. Petersen Mar 13, 2017

scsi: megaraid_sas: enable intx only if msix request fails



Without this fix, driver will enable INTx Interrupt pin even though
MSI-x vectors are enabled. See below lspci output. DisINTx is unset for
MSIx setup.

lspci -s 85:00.0 -vvv |grep INT |grep Control
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx-

After applying this fix, driver will enable INTx Interrupt pin only if
Legacy interrupt method is required.  See below lspci output. DisINTx is
set for MSIx setup.  lspci -s 85:00.0 -vvv |grep INT |grep Control
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR+ FastB2B- DisINTx+

Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
Reviewed-by: Tomas Henzl <thenzl@redhat.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

parent 85e8a239

drivers/scsi/megaraid/megaraid_sas_base.c

+9 −5

Original line number	Diff line number	Diff line
		@@ -5034,12 +5034,14 @@ megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
		&instance->irq_context[j]);
		/* Retry irq register for IO_APIC*/
		instance->msix_vectors = 0;
		if (is_probe)
		if (is_probe) {
		pci_free_irq_vectors(instance->pdev);
		return megasas_setup_irqs_ioapic(instance);
		else
		} else {
		return -1;
		}
		}
		}
		return 0;
		}

		@@ -5277,9 +5279,11 @@ static int megasas_init_fw(struct megasas_instance *instance)
		MPI2_REPLY_POST_HOST_INDEX_OFFSET);
		}

		if (!instance->msix_vectors) {
		i = pci_alloc_irq_vectors(instance->pdev, 1, 1, PCI_IRQ_LEGACY);
		if (i < 0)
		goto fail_setup_irqs;
		}

		dev_info(&instance->pdev->dev,
		"firmware supports msix\t: (%d)", fw_msix_count);