Loading include/sound/hda_register.h +9 −0 Original line number Original line Diff line number Diff line Loading @@ -233,6 +233,15 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define AZX_MLCTL_SPA (1<<16) #define AZX_MLCTL_SPA (1<<16) #define AZX_MLCTL_CPA 23 #define AZX_MLCTL_CPA 23 /* registers for DMA Resume Capability Structure */ #define AZX_DRSM_CAP_ID 0x5 #define AZX_REG_DRSM_CTL 0x4 /* Base used to calculate the iterating register offset */ #define AZX_DRSM_BASE 0x08 /* Interval used to calculate the iterating register offset */ #define AZX_DRSM_INTERVAL 0x08 /* /* * helpers to read the stream position * helpers to read the stream position */ */ Loading include/sound/hdaudio_ext.h +15 −0 Original line number Original line Diff line number Diff line Loading @@ -12,6 +12,7 @@ * @spbcap: SPIB capabilities pointer * @spbcap: SPIB capabilities pointer * @mlcap: MultiLink capabilities pointer * @mlcap: MultiLink capabilities pointer * @gtscap: gts capabilities pointer * @gtscap: gts capabilities pointer * @drsmcap: dma resume capabilities pointer * @hlink_list: link list of HDA links * @hlink_list: link list of HDA links */ */ struct hdac_ext_bus { struct hdac_ext_bus { Loading @@ -23,6 +24,7 @@ struct hdac_ext_bus { void __iomem *spbcap; void __iomem *spbcap; void __iomem *mlcap; void __iomem *mlcap; void __iomem *gtscap; void __iomem *gtscap; void __iomem *drsmcap; struct list_head hlink_list; struct list_head hlink_list; }; }; Loading Loading @@ -72,6 +74,9 @@ enum hdac_ext_stream_type { * @pplc_addr: processing pipe link stream pointer * @pplc_addr: processing pipe link stream pointer * @spib_addr: software position in buffers stream pointer * @spib_addr: software position in buffers stream pointer * @fifo_addr: software position Max fifos stream pointer * @fifo_addr: software position Max fifos stream pointer * @dpibr_addr: DMA position in buffer resume pointer * @dpib: DMA position in buffer * @lpib: Linear position in buffer * @decoupled: stream host and link is decoupled * @decoupled: stream host and link is decoupled * @link_locked: link is locked * @link_locked: link is locked * @link_prepared: link is prepared * @link_prepared: link is prepared Loading @@ -86,6 +91,10 @@ struct hdac_ext_stream { void __iomem *spib_addr; void __iomem *spib_addr; void __iomem *fifo_addr; void __iomem *fifo_addr; void __iomem *dpibr_addr; u32 dpib; u32 lpib; bool decoupled:1; bool decoupled:1; bool link_locked:1; bool link_locked:1; bool link_prepared; bool link_prepared; Loading Loading @@ -116,6 +125,11 @@ int snd_hdac_ext_stream_set_spib(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value); struct hdac_ext_stream *stream, u32 value); int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus, int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream); struct hdac_ext_stream *stream); void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus, bool enable, int index); int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value); int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value); void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream); Loading @@ -133,6 +147,7 @@ struct hdac_ext_link { int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus); int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus); int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus); void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link, void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link, int stream); int stream); Loading sound/hda/ext/hdac_ext_controller.c +28 −1 Original line number Original line Diff line number Diff line Loading @@ -77,6 +77,12 @@ int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus) ebus->spbcap = bus->remap_addr + offset; ebus->spbcap = bus->remap_addr + offset; break; break; case AZX_DRSM_CAP_ID: /* DMA resume capability found, handler function */ dev_dbg(bus->dev, "Found DRSM capability\n"); ebus->drsmcap = bus->remap_addr + offset; break; default: default: dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap); dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap); break; break; Loading Loading @@ -240,7 +246,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable) int mask = (1 << AZX_MLCTL_CPA); int mask = (1 << AZX_MLCTL_CPA); udelay(3); udelay(3); timeout = 50; timeout = 150; do { do { val = readl(link->ml_addr + AZX_REG_ML_LCTL); val = readl(link->ml_addr + AZX_REG_ML_LCTL); Loading Loading @@ -281,6 +287,27 @@ int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link) } } EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down); EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down); /** * snd_hdac_ext_bus_link_power_up_all -power up all hda link * @ebus: HD-audio extended bus */ int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus) { struct hdac_ext_link *hlink = NULL; int ret; list_for_each_entry(hlink, &ebus->hlink_list, list) { snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA); ret = check_hdac_link_power_active(hlink, true); if (ret < 0) return ret; } return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all); /** /** * snd_hdac_ext_bus_link_power_down_all -power down all hda link * snd_hdac_ext_bus_link_power_down_all -power down all hda link * @ebus: HD-audio extended bus * @ebus: HD-audio extended bus Loading sound/hda/ext/hdac_ext_stream.c +72 −0 Original line number Original line Diff line number Diff line Loading @@ -59,6 +59,10 @@ void snd_hdac_ext_stream_init(struct hdac_ext_bus *ebus, AZX_SPB_MAXFIFO; AZX_SPB_MAXFIFO; } } if (ebus->drsmcap) stream->dpibr_addr = ebus->drsmcap + AZX_DRSM_BASE + AZX_DRSM_INTERVAL * idx; stream->decoupled = false; stream->decoupled = false; snd_hdac_stream_init(bus, &stream->hstream, idx, direction, tag); snd_hdac_stream_init(bus, &stream->hstream, idx, direction, tag); } } Loading Loading @@ -107,6 +111,7 @@ void snd_hdac_stream_free_all(struct hdac_ext_bus *ebus) while (!list_empty(&bus->stream_list)) { while (!list_empty(&bus->stream_list)) { s = list_first_entry(&bus->stream_list, struct hdac_stream, list); s = list_first_entry(&bus->stream_list, struct hdac_stream, list); stream = stream_to_hdac_ext_stream(s); stream = stream_to_hdac_ext_stream(s); snd_hdac_ext_stream_decouple(ebus, stream, false); list_del(&s->list); list_del(&s->list); kfree(stream); kfree(stream); } } Loading Loading @@ -497,3 +502,70 @@ void snd_hdac_ext_stop_streams(struct hdac_ext_bus *ebus) } } } } EXPORT_SYMBOL_GPL(snd_hdac_ext_stop_streams); EXPORT_SYMBOL_GPL(snd_hdac_ext_stop_streams); /** * snd_hdac_ext_stream_drsm_enable - enable DMA resume for a stream * @ebus: HD-audio ext core bus * @enable: flag to enable/disable DRSM * @index: stream index for which DRSM need to be enabled */ void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus, bool enable, int index) { u32 mask = 0; u32 register_mask = 0; struct hdac_bus *bus = &ebus->bus; if (!ebus->drsmcap) { dev_err(bus->dev, "Address of DRSM capability is NULL"); return; } mask |= (1 << index); register_mask = readl(ebus->drsmcap + AZX_REG_SPB_SPBFCCTL); mask |= register_mask; if (enable) snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, 0, mask); else snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, mask, 0); } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_drsm_enable); /** * snd_hdac_ext_stream_set_dpibr - sets the dpibr value of a stream * @ebus: HD-audio ext core bus * @stream: hdac_ext_stream * @value: dpib value to set */ int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value) { struct hdac_bus *bus = &ebus->bus; if (!ebus->drsmcap) { dev_err(bus->dev, "Address of DRSM capability is NULL"); return -EINVAL; } writel(value, stream->dpibr_addr); return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_dpibr); /** * snd_hdac_ext_stream_set_lpib - sets the lpib value of a stream * @ebus: HD-audio ext core bus * @stream: hdac_ext_stream * @value: lpib value to set */ int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value) { snd_hdac_stream_writel(&stream->hstream, SD_LPIB, value); return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_lpib); Loading
include/sound/hda_register.h +9 −0 Original line number Original line Diff line number Diff line Loading @@ -233,6 +233,15 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; #define AZX_MLCTL_SPA (1<<16) #define AZX_MLCTL_SPA (1<<16) #define AZX_MLCTL_CPA 23 #define AZX_MLCTL_CPA 23 /* registers for DMA Resume Capability Structure */ #define AZX_DRSM_CAP_ID 0x5 #define AZX_REG_DRSM_CTL 0x4 /* Base used to calculate the iterating register offset */ #define AZX_DRSM_BASE 0x08 /* Interval used to calculate the iterating register offset */ #define AZX_DRSM_INTERVAL 0x08 /* /* * helpers to read the stream position * helpers to read the stream position */ */ Loading
include/sound/hdaudio_ext.h +15 −0 Original line number Original line Diff line number Diff line Loading @@ -12,6 +12,7 @@ * @spbcap: SPIB capabilities pointer * @spbcap: SPIB capabilities pointer * @mlcap: MultiLink capabilities pointer * @mlcap: MultiLink capabilities pointer * @gtscap: gts capabilities pointer * @gtscap: gts capabilities pointer * @drsmcap: dma resume capabilities pointer * @hlink_list: link list of HDA links * @hlink_list: link list of HDA links */ */ struct hdac_ext_bus { struct hdac_ext_bus { Loading @@ -23,6 +24,7 @@ struct hdac_ext_bus { void __iomem *spbcap; void __iomem *spbcap; void __iomem *mlcap; void __iomem *mlcap; void __iomem *gtscap; void __iomem *gtscap; void __iomem *drsmcap; struct list_head hlink_list; struct list_head hlink_list; }; }; Loading Loading @@ -72,6 +74,9 @@ enum hdac_ext_stream_type { * @pplc_addr: processing pipe link stream pointer * @pplc_addr: processing pipe link stream pointer * @spib_addr: software position in buffers stream pointer * @spib_addr: software position in buffers stream pointer * @fifo_addr: software position Max fifos stream pointer * @fifo_addr: software position Max fifos stream pointer * @dpibr_addr: DMA position in buffer resume pointer * @dpib: DMA position in buffer * @lpib: Linear position in buffer * @decoupled: stream host and link is decoupled * @decoupled: stream host and link is decoupled * @link_locked: link is locked * @link_locked: link is locked * @link_prepared: link is prepared * @link_prepared: link is prepared Loading @@ -86,6 +91,10 @@ struct hdac_ext_stream { void __iomem *spib_addr; void __iomem *spib_addr; void __iomem *fifo_addr; void __iomem *fifo_addr; void __iomem *dpibr_addr; u32 dpib; u32 lpib; bool decoupled:1; bool decoupled:1; bool link_locked:1; bool link_locked:1; bool link_prepared; bool link_prepared; Loading Loading @@ -116,6 +125,11 @@ int snd_hdac_ext_stream_set_spib(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value); struct hdac_ext_stream *stream, u32 value); int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus, int snd_hdac_ext_stream_get_spbmaxfifo(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream); struct hdac_ext_stream *stream); void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus, bool enable, int index); int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value); int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value); void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_start(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream); void snd_hdac_ext_link_stream_clear(struct hdac_ext_stream *hstream); Loading @@ -133,6 +147,7 @@ struct hdac_ext_link { int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link); int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus); int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus); int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus); void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link, void snd_hdac_ext_link_set_stream_id(struct hdac_ext_link *link, int stream); int stream); Loading
sound/hda/ext/hdac_ext_controller.c +28 −1 Original line number Original line Diff line number Diff line Loading @@ -77,6 +77,12 @@ int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus) ebus->spbcap = bus->remap_addr + offset; ebus->spbcap = bus->remap_addr + offset; break; break; case AZX_DRSM_CAP_ID: /* DMA resume capability found, handler function */ dev_dbg(bus->dev, "Found DRSM capability\n"); ebus->drsmcap = bus->remap_addr + offset; break; default: default: dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap); dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap); break; break; Loading Loading @@ -240,7 +246,7 @@ static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable) int mask = (1 << AZX_MLCTL_CPA); int mask = (1 << AZX_MLCTL_CPA); udelay(3); udelay(3); timeout = 50; timeout = 150; do { do { val = readl(link->ml_addr + AZX_REG_ML_LCTL); val = readl(link->ml_addr + AZX_REG_ML_LCTL); Loading Loading @@ -281,6 +287,27 @@ int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link) } } EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down); EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down); /** * snd_hdac_ext_bus_link_power_up_all -power up all hda link * @ebus: HD-audio extended bus */ int snd_hdac_ext_bus_link_power_up_all(struct hdac_ext_bus *ebus) { struct hdac_ext_link *hlink = NULL; int ret; list_for_each_entry(hlink, &ebus->hlink_list, list) { snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA); ret = check_hdac_link_power_active(hlink, true); if (ret < 0) return ret; } return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up_all); /** /** * snd_hdac_ext_bus_link_power_down_all -power down all hda link * snd_hdac_ext_bus_link_power_down_all -power down all hda link * @ebus: HD-audio extended bus * @ebus: HD-audio extended bus Loading
sound/hda/ext/hdac_ext_stream.c +72 −0 Original line number Original line Diff line number Diff line Loading @@ -59,6 +59,10 @@ void snd_hdac_ext_stream_init(struct hdac_ext_bus *ebus, AZX_SPB_MAXFIFO; AZX_SPB_MAXFIFO; } } if (ebus->drsmcap) stream->dpibr_addr = ebus->drsmcap + AZX_DRSM_BASE + AZX_DRSM_INTERVAL * idx; stream->decoupled = false; stream->decoupled = false; snd_hdac_stream_init(bus, &stream->hstream, idx, direction, tag); snd_hdac_stream_init(bus, &stream->hstream, idx, direction, tag); } } Loading Loading @@ -107,6 +111,7 @@ void snd_hdac_stream_free_all(struct hdac_ext_bus *ebus) while (!list_empty(&bus->stream_list)) { while (!list_empty(&bus->stream_list)) { s = list_first_entry(&bus->stream_list, struct hdac_stream, list); s = list_first_entry(&bus->stream_list, struct hdac_stream, list); stream = stream_to_hdac_ext_stream(s); stream = stream_to_hdac_ext_stream(s); snd_hdac_ext_stream_decouple(ebus, stream, false); list_del(&s->list); list_del(&s->list); kfree(stream); kfree(stream); } } Loading Loading @@ -497,3 +502,70 @@ void snd_hdac_ext_stop_streams(struct hdac_ext_bus *ebus) } } } } EXPORT_SYMBOL_GPL(snd_hdac_ext_stop_streams); EXPORT_SYMBOL_GPL(snd_hdac_ext_stop_streams); /** * snd_hdac_ext_stream_drsm_enable - enable DMA resume for a stream * @ebus: HD-audio ext core bus * @enable: flag to enable/disable DRSM * @index: stream index for which DRSM need to be enabled */ void snd_hdac_ext_stream_drsm_enable(struct hdac_ext_bus *ebus, bool enable, int index) { u32 mask = 0; u32 register_mask = 0; struct hdac_bus *bus = &ebus->bus; if (!ebus->drsmcap) { dev_err(bus->dev, "Address of DRSM capability is NULL"); return; } mask |= (1 << index); register_mask = readl(ebus->drsmcap + AZX_REG_SPB_SPBFCCTL); mask |= register_mask; if (enable) snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, 0, mask); else snd_hdac_updatel(ebus->drsmcap, AZX_REG_DRSM_CTL, mask, 0); } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_drsm_enable); /** * snd_hdac_ext_stream_set_dpibr - sets the dpibr value of a stream * @ebus: HD-audio ext core bus * @stream: hdac_ext_stream * @value: dpib value to set */ int snd_hdac_ext_stream_set_dpibr(struct hdac_ext_bus *ebus, struct hdac_ext_stream *stream, u32 value) { struct hdac_bus *bus = &ebus->bus; if (!ebus->drsmcap) { dev_err(bus->dev, "Address of DRSM capability is NULL"); return -EINVAL; } writel(value, stream->dpibr_addr); return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_dpibr); /** * snd_hdac_ext_stream_set_lpib - sets the lpib value of a stream * @ebus: HD-audio ext core bus * @stream: hdac_ext_stream * @value: lpib value to set */ int snd_hdac_ext_stream_set_lpib(struct hdac_ext_stream *stream, u32 value) { snd_hdac_stream_writel(&stream->hstream, SD_LPIB, value); return 0; } EXPORT_SYMBOL_GPL(snd_hdac_ext_stream_set_lpib);