Merge "Revert "drm/msm/mdp5: subclass msm_mdss for mdp5"" (647b2c2c) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c

+74 −82

Original line number	Diff line number	Diff line
		/*
		* Copyright (c) 2016, The Linux Foundation. All rights reserved.
		* Copyright (c) 2016, 2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify it
		* under the terms of the GNU General Public License version 2 as published by
		@@ -20,10 +20,12 @@
		#include "msm_drv.h"
		#include "mdp5_kms.h"

		#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base)

		struct mdp5_mdss {
		struct msm_mdss base;
		/*
		* If needed, this can become more specific: something like struct mdp5_mdss,
		* which contains a 'struct msm_mdss base' member.
		*/
		struct msm_mdss {
		struct drm_device *dev;

		void __iomem mmio, vbif;

		@@ -39,22 +41,22 @@ struct mdp5_mdss {
		} irqcontroller;
		};

		static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data)
		static inline void mdss_write(struct msm_mdss *mdss, u32 reg, u32 data)
		{
		msm_writel(data, mdp5_mdss->mmio + reg);
		msm_writel(data, mdss->mmio + reg);
		}

		static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg)
		static inline u32 mdss_read(struct msm_mdss *mdss, u32 reg)
		{
		return msm_readl(mdp5_mdss->mmio + reg);
		return msm_readl(mdss->mmio + reg);
		}

		static irqreturn_t mdss_irq(int irq, void *arg)
		{
		struct mdp5_mdss *mdp5_mdss = arg;
		struct msm_mdss *mdss = arg;
		u32 intr;

		intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);
		intr = mdss_read(mdss, REG_MDSS_HW_INTR_STATUS);

		VERB("intr=%08x", intr);

		@@ -62,7 +64,7 @@ static irqreturn_t mdss_irq(int irq, void *arg)
		irq_hw_number_t hwirq = fls(intr) - 1;

		generic_handle_irq(irq_find_mapping(
		mdp5_mdss->irqcontroller.domain, hwirq));
		mdss->irqcontroller.domain, hwirq));
		intr &= ~(1 << hwirq);
		}

		@@ -82,19 +84,19 @@ static irqreturn_t mdss_irq(int irq, void *arg)

		static void mdss_hw_mask_irq(struct irq_data *irqd)
		{
		struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
		struct msm_mdss *mdss = irq_data_get_irq_chip_data(irqd);

		smp_mb__before_atomic();
		clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
		clear_bit(irqd->hwirq, &mdss->irqcontroller.enabled_mask);
		smp_mb__after_atomic();
		}

		static void mdss_hw_unmask_irq(struct irq_data *irqd)
		{
		struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
		struct msm_mdss *mdss = irq_data_get_irq_chip_data(irqd);

		smp_mb__before_atomic();
		set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
		set_bit(irqd->hwirq, &mdss->irqcontroller.enabled_mask);
		smp_mb__after_atomic();
		}

		@@ -107,13 +109,13 @@ static struct irq_chip mdss_hw_irq_chip = {
		static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
		irq_hw_number_t hwirq)
		{
		struct mdp5_mdss *mdp5_mdss = d->host_data;
		struct msm_mdss *mdss = d->host_data;

		if (!(VALID_IRQS & (1 << hwirq)))
		return -EPERM;

		irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq);
		irq_set_chip_data(irq, mdp5_mdss);
		irq_set_chip_data(irq, mdss);

		return 0;
		}
		@@ -124,99 +126,90 @@ static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
		};


		static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss)
		static int mdss_irq_domain_init(struct msm_mdss *mdss)
		{
		struct device *dev = mdp5_mdss->base.dev->dev;
		struct device *dev = mdss->dev->dev;
		struct irq_domain *d;

		d = irq_domain_add_linear(dev->of_node, 32, &mdss_hw_irqdomain_ops,
		mdp5_mdss);
		mdss);
		if (!d) {
		dev_err(dev, "mdss irq domain add failed\n");
		return -ENXIO;
		}

		mdp5_mdss->irqcontroller.enabled_mask = 0;
		mdp5_mdss->irqcontroller.domain = d;
		mdss->irqcontroller.enabled_mask = 0;
		mdss->irqcontroller.domain = d;

		return 0;
		}

		static int mdp5_mdss_enable(struct msm_mdss *mdss)
		int msm_mdss_enable(struct msm_mdss *mdss)
		{
		struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
		DBG("");

		clk_prepare_enable(mdp5_mdss->ahb_clk);
		if (mdp5_mdss->axi_clk)
		clk_prepare_enable(mdp5_mdss->axi_clk);
		if (mdp5_mdss->vsync_clk)
		clk_prepare_enable(mdp5_mdss->vsync_clk);
		clk_prepare_enable(mdss->ahb_clk);
		if (mdss->axi_clk)
		clk_prepare_enable(mdss->axi_clk);
		if (mdss->vsync_clk)
		clk_prepare_enable(mdss->vsync_clk);

		return 0;
		}

		static int mdp5_mdss_disable(struct msm_mdss *mdss)
		int msm_mdss_disable(struct msm_mdss *mdss)
		{
		struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
		DBG("");

		if (mdp5_mdss->vsync_clk)
		clk_disable_unprepare(mdp5_mdss->vsync_clk);
		if (mdp5_mdss->axi_clk)
		clk_disable_unprepare(mdp5_mdss->axi_clk);
		clk_disable_unprepare(mdp5_mdss->ahb_clk);
		if (mdss->vsync_clk)
		clk_disable_unprepare(mdss->vsync_clk);
		if (mdss->axi_clk)
		clk_disable_unprepare(mdss->axi_clk);
		clk_disable_unprepare(mdss->ahb_clk);

		return 0;
		}

		static int msm_mdss_get_clocks(struct mdp5_mdss *mdp5_mdss)
		static int msm_mdss_get_clocks(struct msm_mdss *mdss)
		{
		struct platform_device *pdev =
		to_platform_device(mdp5_mdss->base.dev->dev);
		struct platform_device *pdev = to_platform_device(mdss->dev->dev);

		mdp5_mdss->ahb_clk = msm_clk_get(pdev, "iface");
		if (IS_ERR(mdp5_mdss->ahb_clk))
		mdp5_mdss->ahb_clk = NULL;
		mdss->ahb_clk = msm_clk_get(pdev, "iface");
		if (IS_ERR(mdss->ahb_clk))
		mdss->ahb_clk = NULL;

		mdp5_mdss->axi_clk = msm_clk_get(pdev, "bus");
		if (IS_ERR(mdp5_mdss->axi_clk))
		mdp5_mdss->axi_clk = NULL;
		mdss->axi_clk = msm_clk_get(pdev, "bus");
		if (IS_ERR(mdss->axi_clk))
		mdss->axi_clk = NULL;

		mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync");
		if (IS_ERR(mdp5_mdss->vsync_clk))
		mdp5_mdss->vsync_clk = NULL;
		mdss->vsync_clk = msm_clk_get(pdev, "vsync");
		if (IS_ERR(mdss->vsync_clk))
		mdss->vsync_clk = NULL;

		return 0;
		}

		static void mdp5_mdss_destroy(struct drm_device *dev)
		void msm_mdss_destroy(struct drm_device *dev)
		{
		struct msm_drm_private *priv = dev->dev_private;
		struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(priv->mdss);
		struct msm_mdss *mdss = priv->mdss;

		if (!mdp5_mdss)
		if (!mdss)
		return;

		irq_domain_remove(mdp5_mdss->irqcontroller.domain);
		mdp5_mdss->irqcontroller.domain = NULL;
		irq_domain_remove(mdss->irqcontroller.domain);
		mdss->irqcontroller.domain = NULL;

		regulator_disable(mdp5_mdss->vdd);
		regulator_disable(mdss->vdd);

		pm_runtime_disable(dev->dev);
		}

		static const struct msm_mdss_funcs mdss_funcs = {
		.enable = mdp5_mdss_enable,
		.disable = mdp5_mdss_disable,
		.destroy = mdp5_mdss_destroy,
		};

		int mdp5_mdss_init(struct drm_device *dev)
		int msm_mdss_init(struct drm_device *dev)
		{
		struct platform_device *pdev = to_platform_device(dev->dev);
		struct msm_drm_private *priv = dev->dev_private;
		struct mdp5_mdss *mdp5_mdss;
		struct msm_mdss *mdss;
		int ret;

		DBG("");
		@@ -224,40 +217,40 @@ int mdp5_mdss_init(struct drm_device *dev)
		if (!of_device_is_compatible(dev->dev->of_node, "qcom,mdss"))
		return 0;

		mdp5_mdss = devm_kzalloc(dev->dev, sizeof(*mdp5_mdss), GFP_KERNEL);
		if (!mdp5_mdss) {
		mdss = devm_kzalloc(dev->dev, sizeof(*mdss), GFP_KERNEL);
		if (!mdss) {
		ret = -ENOMEM;
		goto fail;
		}

		mdp5_mdss->base.dev = dev;
		mdss->dev = dev;

		mdp5_mdss->mmio = msm_ioremap(pdev, "mdss_phys", "MDSS");
		if (IS_ERR(mdp5_mdss->mmio)) {
		ret = PTR_ERR(mdp5_mdss->mmio);
		mdss->mmio = msm_ioremap(pdev, "mdss_phys", "MDSS");
		if (IS_ERR(mdss->mmio)) {
		ret = PTR_ERR(mdss->mmio);
		goto fail;
		}

		mdp5_mdss->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
		if (IS_ERR(mdp5_mdss->vbif)) {
		ret = PTR_ERR(mdp5_mdss->vbif);
		mdss->vbif = msm_ioremap(pdev, "vbif_phys", "VBIF");
		if (IS_ERR(mdss->vbif)) {
		ret = PTR_ERR(mdss->vbif);
		goto fail;
		}

		ret = msm_mdss_get_clocks(mdp5_mdss);
		ret = msm_mdss_get_clocks(mdss);
		if (ret) {
		dev_err(dev->dev, "failed to get clocks: %d\n", ret);
		goto fail;
		}

		/* Regulator to enable GDSCs in downstream kernels */
		mdp5_mdss->vdd = devm_regulator_get(dev->dev, "vdd");
		if (IS_ERR(mdp5_mdss->vdd)) {
		ret = PTR_ERR(mdp5_mdss->vdd);
		mdss->vdd = devm_regulator_get(dev->dev, "vdd");
		if (IS_ERR(mdss->vdd)) {
		ret = PTR_ERR(mdss->vdd);
		goto fail;
		}

		ret = regulator_enable(mdp5_mdss->vdd);
		ret = regulator_enable(mdss->vdd);
		if (ret) {
		dev_err(dev->dev, "failed to enable regulator vdd: %d\n",
		ret);
		@@ -265,26 +258,25 @@ int mdp5_mdss_init(struct drm_device *dev)
		}

		ret = devm_request_irq(dev->dev, platform_get_irq(pdev, 0),
		mdss_irq, 0, "mdss_isr", mdp5_mdss);
		mdss_irq, 0, "mdss_isr", mdss);
		if (ret) {
		dev_err(dev->dev, "failed to init irq: %d\n", ret);
		goto fail_irq;
		}

		ret = mdss_irq_domain_init(mdp5_mdss);
		ret = mdss_irq_domain_init(mdss);
		if (ret) {
		dev_err(dev->dev, "failed to init sub-block irqs: %d\n", ret);
		goto fail_irq;
		}

		mdp5_mdss->base.funcs = &mdss_funcs;
		priv->mdss = &mdp5_mdss->base;
		priv->mdss = mdss;

		pm_runtime_enable(dev->dev);

		return 0;
		fail_irq:
		regulator_disable(mdp5_mdss->vdd);
		regulator_disable(mdss->vdd);
		fail:
		return ret;
		}

drivers/gpu/drm/msm/msm_drv.c

+7 −15

Original line number	Diff line number	Diff line
		@@ -265,7 +265,6 @@ static int msm_drm_uninit(struct device *dev)
		struct drm_device *ddev = platform_get_drvdata(pdev);
		struct msm_drm_private *priv = ddev->dev_private;
		struct msm_kms *kms = priv->kms;
		struct msm_mdss *mdss = priv->mdss;
		struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
		struct vblank_event vbl_ev, tmp;

		@@ -316,8 +315,7 @@ static int msm_drm_uninit(struct device *dev)

		component_unbind_all(dev, ddev);

		if (mdss && mdss->funcs)
		mdss->funcs->destroy(ddev);
		msm_mdss_destroy(ddev);

		ddev->dev_private = NULL;
		drm_dev_unref(ddev);
		@@ -419,7 +417,6 @@ static int msm_drm_init(struct device dev, struct drm_driver drv)
		struct drm_device *ddev;
		struct msm_drm_private *priv;
		struct msm_kms *kms;
		struct msm_mdss *mdss;
		int ret;

		ddev = drm_dev_alloc(drv, dev);
		@@ -439,15 +436,13 @@ static int msm_drm_init(struct device dev, struct drm_driver drv)
		ddev->dev_private = priv;
		priv->dev = ddev;

		ret = mdp5_mdss_init(ddev);
		ret = msm_mdss_init(ddev);
		if (ret) {
		kfree(priv);
		drm_dev_unref(ddev);
		return ret;
		}

		mdss = priv->mdss;

		priv->wq = alloc_ordered_workqueue("msm", 0);
		priv->atomic_wq = alloc_ordered_workqueue("msm:atomic", 0);

		@@ -461,8 +456,7 @@ static int msm_drm_init(struct device dev, struct drm_driver drv)
		/* Bind all our sub-components: */
		ret = component_bind_all(dev, ddev);
		if (ret) {
		if (mdss && mdss->funcs)
		mdss->funcs->destroy(ddev);
		msm_mdss_destroy(ddev);
		kfree(priv);
		drm_dev_unref(ddev);
		return ret;
		@@ -990,12 +984,11 @@ static int msm_runtime_suspend(struct device *dev)
		{
		struct drm_device *ddev = dev_get_drvdata(dev);
		struct msm_drm_private *priv = ddev->dev_private;
		struct msm_mdss *mdss = priv->mdss;

		DBG("");

		if (mdss && mdss->funcs)
		return mdss->funcs->disable(mdss);
		if (priv->mdss)
		return msm_mdss_disable(priv->mdss);

		return 0;
		}
		@@ -1004,12 +997,11 @@ static int msm_runtime_resume(struct device *dev)
		{
		struct drm_device *ddev = dev_get_drvdata(dev);
		struct msm_drm_private *priv = ddev->dev_private;
		struct msm_mdss *mdss = priv->mdss;

		DBG("");

		if (mdss && mdss->funcs)
		return mdss->funcs->enable(mdss);
		if (priv->mdss)
		return msm_mdss_enable(priv->mdss);

		return 0;
		}

drivers/gpu/drm/msm/msm_kms.h

+4 −13

Original line number	Diff line number	Diff line
		@@ -86,18 +86,9 @@ static inline void msm_kms_init(struct msm_kms *kms,

		struct msm_kms mdp4_kms_init(struct drm_device dev);
		struct msm_kms mdp5_kms_init(struct drm_device dev);

		struct msm_mdss_funcs {
		int (enable)(struct msm_mdss mdss);
		int (disable)(struct msm_mdss mdss);
		void (destroy)(struct drm_device dev);
		};

		struct msm_mdss {
		struct drm_device *dev;
		const struct msm_mdss_funcs *funcs;
		};

		int mdp5_mdss_init(struct drm_device *dev);
		int msm_mdss_init(struct drm_device *dev);
		void msm_mdss_destroy(struct drm_device *dev);
		int msm_mdss_enable(struct msm_mdss *mdss);
		int msm_mdss_disable(struct msm_mdss *mdss);

		#endif /* __MSM_KMS_H__ */