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Commit 64511df4 authored by Emmanuel Grumbach's avatar Emmanuel Grumbach Committed by Luca Coelho
Browse files

iwlwifi: mvm: remove the corunning support 



The corunning block was supposed to help in coex scenarios.
It required the driver to configure the firmware based on
the coupling between the two antennas of the devices.
This was never in use and the configuration sent by the
driver has always been blank.
Remove all that code.

Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
Signed-off-by: default avatarLuca Coelho <luciano.coelho@intel.com>
parent 38ef6235

drivers/net/wireless/intel/iwlwifi/fw/api/coex.h

+0 −13
Original line number Diff line number Diff line
@@ -76,7 +76,6 @@ enum iwl_bt_coex_lut_type { 
	BT_COEX_INVALID_LUT = 0xff,

}; /* BT_COEX_DECISION_LUT_INDEX_API_E_VER_1 */



#define BT_COEX_CORUN_LUT_SIZE (32)

#define BT_REDUCED_TX_POWER_BIT BIT(7)



enum iwl_bt_coex_mode {
@@ -106,18 +105,6 @@ struct iwl_bt_coex_cmd { 
	__le32 enabled_modules;

} __packed; /* BT_COEX_CMD_API_S_VER_6 */



/**

 * struct iwl_bt_coex_corun_lut_update - bt coex update the corun lut

 * @corun_lut20: co-running 20 MHz LUT configuration

 * @corun_lut40: co-running 40 MHz LUT configuration

 *

 * The structure is used for the BT_COEX_UPDATE_CORUN_LUT command.

 */

struct iwl_bt_coex_corun_lut_update_cmd {

	__le32 corun_lut20[BT_COEX_CORUN_LUT_SIZE];

	__le32 corun_lut40[BT_COEX_CORUN_LUT_SIZE];

} __packed; /* BT_COEX_UPDATE_CORUN_LUT_API_S_VER_1 */



/**

 * struct iwl_bt_coex_reduced_txp_update_cmd

 * @reduced_txp: bit BT_REDUCED_TX_POWER_BIT to enable / disable, rest of the

drivers/net/wireless/intel/iwlwifi/fw/api/commands.h

+0 −12
Original line number Diff line number Diff line
@@ -135,12 +135,6 @@ enum iwl_legacy_cmds { 
	 */

	DBG_CFG = 0x9,



	/**

	 * @ANTENNA_COUPLING_NOTIFICATION:

	 * Antenna coupling data, &struct iwl_mvm_antenna_coupling_notif

	 */

	ANTENNA_COUPLING_NOTIFICATION = 0xa,



	/**

	 * @SCAN_ITERATION_COMPLETE_UMAC:

	 * Firmware indicates a scan iteration completed, using
@@ -523,12 +517,6 @@ enum iwl_legacy_cmds { 
	 */

	BT_CONFIG = 0x9b,



	/**

	 * @BT_COEX_UPDATE_CORUN_LUT:

	 * &struct iwl_bt_coex_corun_lut_update_cmd

	 */

	BT_COEX_UPDATE_CORUN_LUT = 0x5b,



	/**

	 * @BT_COEX_UPDATE_REDUCED_TXP:

	 * &struct iwl_bt_coex_reduced_txp_update_cmd

drivers/net/wireless/intel/iwlwifi/fw/api/config.h

+0 −8
Original line number Diff line number Diff line
@@ -181,12 +181,4 @@ struct iwl_dc2dc_config_resp { 
	__le32 dc2dc_freq_tune1;

} __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */



/**

 * struct iwl_mvm_antenna_coupling_notif - antenna coupling notification

 * @isolation: antenna isolation value

 */

struct iwl_mvm_antenna_coupling_notif {

	__le32 isolation;

} __packed;



#endif /* __iwl_fw_api_config_h__ */

drivers/net/wireless/intel/iwlwifi/mvm/coex.c

+0 −268
Original line number Diff line number Diff line
@@ -148,215 +148,6 @@ static const __le64 iwl_ci_mask[][3] = { 
	},

};



struct corunning_block_luts {

	u8 range;

	__le32 lut20[BT_COEX_CORUN_LUT_SIZE];

};



/*

 * Ranges for the antenna coupling calibration / co-running block LUT:

 *		LUT0: [ 0, 12[

 *		LUT1: [12, 20[

 *		LUT2: [20, 21[

 *		LUT3: [21, 23[

 *		LUT4: [23, 27[

 *		LUT5: [27, 30[

 *		LUT6: [30, 32[

 *		LUT7: [32, 33[

 *		LUT8: [33, - [

 */

static const struct corunning_block_luts antenna_coupling_ranges[] = {

	{

		.range = 0,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 12,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 20,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 21,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 23,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 27,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 30,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 32,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

	{

		.range = 33,

		.lut20 = {

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

			cpu_to_le32(0x00000000),  cpu_to_le32(0x00000000),

		},

	},

};



static enum iwl_bt_coex_lut_type

iwl_get_coex_type(struct iwl_mvm *mvm, const struct ieee80211_vif *vif)

{
@@ -437,9 +228,6 @@ int iwl_mvm_send_bt_init_conf(struct iwl_mvm *mvm) 
		bt_cmd.enabled_modules |=

			cpu_to_le32(BT_COEX_SYNC2SCO_ENABLED);



	if (iwl_mvm_bt_is_plcr_supported(mvm))

		bt_cmd.enabled_modules |= cpu_to_le32(BT_COEX_CORUN_ENABLED);



	if (iwl_mvm_is_mplut_supported(mvm))

		bt_cmd.enabled_modules |= cpu_to_le32(BT_COEX_MPLUT_ENABLED);
@@ -908,59 +696,3 @@ void iwl_mvm_bt_coex_vif_change(struct iwl_mvm *mvm) 
{

	iwl_mvm_bt_coex_notif_handle(mvm);

}
 


void iwl_mvm_rx_ant_coupling_notif(struct iwl_mvm *mvm,

				   struct iwl_rx_cmd_buffer *rxb)

{

	struct iwl_rx_packet *pkt = rxb_addr(rxb);

	struct iwl_mvm_antenna_coupling_notif *notif = (void *)pkt->data;

	u32 ant_isolation = le32_to_cpu(notif->isolation);

	struct iwl_bt_coex_corun_lut_update_cmd cmd = {};

	u8 __maybe_unused lower_bound, upper_bound;

	u8 lut;



	if (!iwl_mvm_bt_is_plcr_supported(mvm))

		return;



	lockdep_assert_held(&mvm->mutex);



	/* Ignore updates if we are in force mode */

	if (unlikely(mvm->bt_force_ant_mode != BT_FORCE_ANT_DIS))

		return;



	if (ant_isolation ==  mvm->last_ant_isol)

		return;



	for (lut = 0; lut < ARRAY_SIZE(antenna_coupling_ranges) - 1; lut++)

		if (ant_isolation < antenna_coupling_ranges[lut + 1].range)

			break;



	lower_bound = antenna_coupling_ranges[lut].range;



	if (lut < ARRAY_SIZE(antenna_coupling_ranges) - 1)

		upper_bound = antenna_coupling_ranges[lut + 1].range;

	else

		upper_bound = antenna_coupling_ranges[lut].range;



	IWL_DEBUG_COEX(mvm, "Antenna isolation=%d in range [%d,%d[, lut=%d\n",

		       ant_isolation, lower_bound, upper_bound, lut);



	mvm->last_ant_isol = ant_isolation;



	if (mvm->last_corun_lut == lut)

		return;



	mvm->last_corun_lut = lut;



	/* For the moment, use the same LUT for 20GHz and 40GHz */

	memcpy(&cmd.corun_lut20, antenna_coupling_ranges[lut].lut20,

	       sizeof(cmd.corun_lut20));



	memcpy(&cmd.corun_lut40, antenna_coupling_ranges[lut].lut20,

	       sizeof(cmd.corun_lut40));



	if (iwl_mvm_send_cmd_pdu(mvm, BT_COEX_UPDATE_CORUN_LUT, 0,

				 sizeof(cmd), &cmd))

		IWL_ERR(mvm,

			"failed to send BT_COEX_UPDATE_CORUN_LUT command\n");

}

drivers/net/wireless/intel/iwlwifi/mvm/constants.h

+0 −1
Original line number Diff line number Diff line
@@ -95,7 +95,6 @@ 
#define IWL_MVM_BT_COEX_EN_RED_TXP_THRESH	62

#define IWL_MVM_BT_COEX_DIS_RED_TXP_THRESH	65

#define IWL_MVM_BT_COEX_SYNC2SCO		1

#define IWL_MVM_BT_COEX_CORUNNING		0

#define IWL_MVM_BT_COEX_MPLUT			1

#define IWL_MVM_BT_COEX_RRC			1

#define IWL_MVM_BT_COEX_TTC			1