Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 643ced9b authored by Li Peng's avatar Li Peng Committed by Eric Anholt
Browse files

drm/i915: don't trigger ironlake vblank interrupt at irq install 



Zhenyu noticed that the ironlake vblank enabling patch has one
issue that it will trigger vblank starting from irq postinstall,
this isn't necessary. This patch addresses this issue by only
adding the vblank into DEIER but mask them in DEIMR, so that it
won't trigger vblank interrupt at irq install.

Signed-off-by: default avatarLi Peng <peng.li@intel.com>
Acked-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent de3f440f

drivers/gpu/drm/i915/i915_irq.c

+2 −3
Original line number Diff line number Diff line
@@ -1022,14 +1022,13 @@ static int ironlake_irq_postinstall(struct drm_device *dev) 
{

	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;

	/* enable kind of interrupts always enabled */

	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |

			   DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;

	u32 display_mask = DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT;

	u32 render_mask = GT_USER_INTERRUPT;

	u32 hotplug_mask = SDE_CRT_HOTPLUG | SDE_PORTB_HOTPLUG |

			   SDE_PORTC_HOTPLUG | SDE_PORTD_HOTPLUG;



	dev_priv->irq_mask_reg = ~display_mask;

	dev_priv->de_irq_enable_reg = display_mask;

	dev_priv->de_irq_enable_reg = display_mask | DE_PIPEA_VBLANK | DE_PIPEB_VBLANK;



	/* should always can generate irq */

	I915_WRITE(DEIIR, I915_READ(DEIIR));