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Commit 63fb2e85 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'at91-cleanup2' of...

Merge tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup

Pull "Second batch of cleanup for 4.1" from Nicolas Ferre:

- remove unused matrix header files
- dbgu + chip identification: new driver for SoC detection
  this allow to remove all additional io mapping
- remove old non-standard AT91 setup code

First batch of cleanup for 4.1:
  - little phy fixup that is not needed anymore
  - hudge cleanup of the PM code:
  - removal of "use slow clock" option => always use this for suspend to RAM
  - quicker suspend as the asm function is copied only once to SRAM
  - use of the same asm function for "standby" and "mem" types of suspend
    actions
  - adaptation to the ARMv7 processors

* tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (44 commits)
  ARM: at91: remove old setup
  ARM: at91: sama5d4: remove useless map_io
  ARM: at91: sama5 use SoC detection infrastructure
  ARM: at91: at91sam9: use SoC detection infrastructure
  ARM: at91: at91rm9200 use SoC detection infrastructure
  ARM: at91: add soc detection infrastructure
  ARM: at91/dt: introduce atmel,<chip>-dbgu
  ARM: at91: remove unused _matrix.h headers
  ARM: at91: remove unused at91_ioremap_matrix and header
  ARM: at91: remove NEED_MACH_IO_H
  ARM: at91/pm: flush data cache and clean, invalidate and disable the L2 cache
  ARM: at91/pm_suspend: add the WFI instruction support for ARMv7
  ARM: at91/pm: remove unused void (*at91_pm_standby)(void)
  ARM: at91/pm: rename function name: at91_slow_clock() --> at91_pm_suspend_sram_fn()
  ARM: at91/pm: rename file name: pm_slowclock.S --> pm_suspend.S
  ARM: at91/pm: standby mode uses same sram function as suspend to memory mode
  ARM: at91/pm: move the copying the sram function to the sram initialization phase
  ARM: at91/pm_slowclock: create the procedure to handle the sdram self-refresh
  ARM: at91/pm_slowclock: remove clocks which are already stopped when entering slow clock mode
  ARM: at91/pm: remove CONFIG_AT91_SLOW_CLOCK config option
  ...
parents 4c071429 598e0855
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+2 −1
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* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)

Required properties:
- compatible: Should be "atmel,<chip>-usart"
- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
  The compatible <chip> indicated will be the first SoC to support an
  additional mode or an USART new feature.
  For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
+5 −0
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@@ -26,6 +26,11 @@ Optional properties:
- atmel,disable : Should be present if you want to disable the watchdog.
- atmel,idle-halt : Should be present if you want to stop the watchdog when
	entering idle state.
	CAUTION: This property should be used with care, it actually makes the
	watchdog not counting when the CPU is in idle state, therefore the
	watchdog reset time depends on mean CPU usage and will not reset at all
	if the CPU stop working while it is in idle state, which is probably
	not what you want.
- atmel,dbg-halt : Should be present if you want to stop the watchdog when
	entering debug state.

+1 −1
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@@ -361,9 +361,9 @@ config ARCH_AT91
	select ARCH_REQUIRE_GPIOLIB
	select CLKDEV_LOOKUP
	select IRQ_DOMAIN
	select NEED_MACH_IO_H if PCCARD
	select PINCTRL
	select PINCTRL_AT91
	select SOC_BUS
	select USE_OF
	help
	  This enables support for systems based on Atmel
+1 −1
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@@ -830,7 +830,7 @@
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91rm9200-usart";
				compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
+4 −5
Original line number Diff line number Diff line
@@ -494,12 +494,12 @@

					pinctrl_usart3_rts: usart3_rts-0 {
						atmel,pins =
							<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC8 periph B */
							<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};

					pinctrl_usart3_cts: usart3_cts-0 {
						atmel,pins =
							<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PC10 periph B */
							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
					};
				};

@@ -753,7 +753,7 @@
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
				pinctrl-names = "default";
@@ -853,7 +853,7 @@
			};

			usb1: gadget@fffa4000 {
				compatible = "atmel,at91rm9200-udc";
				compatible = "atmel,at91sam9260-udc";
				reg = <0xfffa4000 0x4000>;
				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
				clocks = <&udc_clk>, <&udpck>;
@@ -976,7 +976,6 @@
				atmel,watchdog-type = "hardware";
				atmel,reset-type = "all";
				atmel,dbg-halt;
				atmel,idle-halt;
				status = "disabled";
			};

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