Loading arch/arm64/boot/dts/qcom/kona.dtsi +47 −34 Original line number Diff line number Diff line Loading @@ -2127,64 +2127,77 @@ qcom,mhi-event-ring-id-limits = <9 11>; /* start and end */ qcom,modem-cfg-emb-pipe-flt; qcom,use-ipa-pm; qcom,arm-smmu; qcom,smmu-fast-map; qcom,bandwidth-vote-for-ipa; qcom,use-64-bit-dma-mask; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <5>; qcom,msm-bus,num-paths = <4>; qcom,msm-bus,num-paths = <5>; qcom,msm-bus,vectors-KBps = /* No vote */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 0 0>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>, /* SVS2 */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 600000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 350000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 40000 40000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 125>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 150000 600000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 150000 1804000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 75000 300000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 76800>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 150>, /* SVS */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 640000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 640000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 80000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 250>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 625000 1200000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 625000 3072000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 312500 700000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 150000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 240>, /* NOMINAL */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 960000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 960000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 160000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 500>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 1250000 2400000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 1250000 6220800>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 625000 1500000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 400000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 466>, /* TURBO */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 3600000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 3600000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 300000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 600>; <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 2000000 3500000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 2000000 7219200>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 1000000 1920000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 400000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 533>; qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", "TURBO"; qcom,throughput-threshold = <310 600 1000>; qcom,throughput-threshold = <600 2500 5000>; qcom,scaling-exceptions = <>; }; ipa_smmu_ap: ipa_smmu_ap { compatible = "qcom,ipa-smmu-ap-cb"; iommus = <&apps_smmu 0x5C0 0x0>; qcom,iommu-dma = "bypass"; qcom,iova-mapping = <0x20000000 0x40000000>; qcom,additional-mapping = /* modem tables in IMEM */ <0x146BD000 0x146BD000 0x2000>; dma-coherent; qcom,iommu-dma = "disabled"; }; ipa_smmu_wlan: ipa_smmu_wlan { compatible = "qcom,ipa-smmu-wlan-cb"; iommus = <&apps_smmu 0x5C1 0x0>; qcom,iommu-dma = "bypass"; qcom,iommu-dma = "disabled"; }; ipa_smmu_uc: ipa_smmu_uc { compatible = "qcom,ipa-smmu-uc-cb"; iommus = <&apps_smmu 0x5C2 0x0>; qcom,iommu-dma = "bypass"; qcom,iova-mapping = <0x40000000 0x20000000>; qcom,iommu-dma = "disabled"; }; }; qcom,glink { Loading Loading
arch/arm64/boot/dts/qcom/kona.dtsi +47 −34 Original line number Diff line number Diff line Loading @@ -2127,64 +2127,77 @@ qcom,mhi-event-ring-id-limits = <9 11>; /* start and end */ qcom,modem-cfg-emb-pipe-flt; qcom,use-ipa-pm; qcom,arm-smmu; qcom,smmu-fast-map; qcom,bandwidth-vote-for-ipa; qcom,use-64-bit-dma-mask; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <5>; qcom,msm-bus,num-paths = <4>; qcom,msm-bus,num-paths = <5>; qcom,msm-bus,vectors-KBps = /* No vote */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 0 0>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>, /* SVS2 */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 600000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 350000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 40000 40000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 125>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 150000 600000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 150000 1804000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 75000 300000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 76800>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 150>, /* SVS */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 640000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 640000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 80000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 250>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 625000 1200000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 625000 3072000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 312500 700000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 150000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 240>, /* NOMINAL */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 960000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 960000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 160000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 500>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 1250000 2400000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 1250000 6220800>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 625000 1500000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 400000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 466>, /* TURBO */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 3600000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 3600000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 300000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 600>; <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_LLCC 2000000 3500000>, <MSM_BUS_MASTER_LLCC MSM_BUS_SLAVE_EBI_CH0 2000000 7219200>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 1000000 1920000>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 400000>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 533>; qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", "TURBO"; qcom,throughput-threshold = <310 600 1000>; qcom,throughput-threshold = <600 2500 5000>; qcom,scaling-exceptions = <>; }; ipa_smmu_ap: ipa_smmu_ap { compatible = "qcom,ipa-smmu-ap-cb"; iommus = <&apps_smmu 0x5C0 0x0>; qcom,iommu-dma = "bypass"; qcom,iova-mapping = <0x20000000 0x40000000>; qcom,additional-mapping = /* modem tables in IMEM */ <0x146BD000 0x146BD000 0x2000>; dma-coherent; qcom,iommu-dma = "disabled"; }; ipa_smmu_wlan: ipa_smmu_wlan { compatible = "qcom,ipa-smmu-wlan-cb"; iommus = <&apps_smmu 0x5C1 0x0>; qcom,iommu-dma = "bypass"; qcom,iommu-dma = "disabled"; }; ipa_smmu_uc: ipa_smmu_uc { compatible = "qcom,ipa-smmu-uc-cb"; iommus = <&apps_smmu 0x5C2 0x0>; qcom,iommu-dma = "bypass"; qcom,iova-mapping = <0x40000000 0x20000000>; qcom,iommu-dma = "disabled"; }; }; qcom,glink { Loading