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Commit 62e1baa1 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Remove superfluous powersave work flushing 



Instead of flushing the outstanding enabling, remember the requested
frequency to apply when the powersave work runs.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1468397438-21226-6-git-send-email-chris@chris-wilson.co.uk
parent 29ecd78d

drivers/gpu/drm/i915/i915_debugfs.c

+2 −28
Original line number Diff line number Diff line
@@ -1205,8 +1205,6 @@ static int i915_frequency_info(struct seq_file *m, void *unused) 


	intel_runtime_pm_get(dev_priv);



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	if (IS_GEN5(dev)) {

		u16 rgvswctl = I915_READ16(MEMSWCTL);

		u16 rgvstat = I915_READ16(MEMSTAT_ILK);
@@ -1898,8 +1896,6 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) 


	intel_runtime_pm_get(dev_priv);



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);

	if (ret)

		goto out;
@@ -4952,20 +4948,11 @@ i915_max_freq_get(void *data, u64 *val) 
{

	struct drm_device *dev = data;

	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	if (INTEL_INFO(dev)->gen < 6)

		return -ENODEV;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);

	if (ret)

		return ret;



	*val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);

	mutex_unlock(&dev_priv->rps.hw_lock);



	return 0;

}
@@ -4980,8 +4967,6 @@ i915_max_freq_set(void *data, u64 val) 
	if (INTEL_INFO(dev)->gen < 6)

		return -ENODEV;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);



	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
@@ -5019,20 +5004,11 @@ i915_min_freq_get(void *data, u64 *val) 
{

	struct drm_device *dev = data;

	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	if (INTEL_INFO(dev)->gen < 6)

	if (INTEL_GEN(dev_priv) < 6)

		return -ENODEV;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);

	if (ret)

		return ret;



	*val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);

	mutex_unlock(&dev_priv->rps.hw_lock);



	return 0;

}
@@ -5044,11 +5020,9 @@ i915_min_freq_set(void *data, u64 val) 
	u32 hw_max, hw_min;

	int ret;



	if (INTEL_INFO(dev)->gen < 6)

	if (INTEL_GEN(dev_priv) < 6)

		return -ENODEV;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);



	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);

drivers/gpu/drm/i915/i915_sysfs.c

+14 −38
Original line number Diff line number Diff line
@@ -271,8 +271,6 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev, 
	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	intel_runtime_pm_get(dev_priv);



	mutex_lock(&dev_priv->rps.hw_lock);
@@ -303,19 +301,10 @@ static ssize_t gt_cur_freq_mhz_show(struct device *kdev, 
	struct drm_minor *minor = dev_to_drm_minor(kdev);

	struct drm_device *dev = minor->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	intel_runtime_pm_get(dev_priv);



	mutex_lock(&dev_priv->rps.hw_lock);

	ret = intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq);

	mutex_unlock(&dev_priv->rps.hw_lock);



	intel_runtime_pm_put(dev_priv);



	return snprintf(buf, PAGE_SIZE, "%d\n", ret);

	return snprintf(buf, PAGE_SIZE, "%d\n",

			intel_gpu_freq(dev_priv,

				       dev_priv->rps.cur_freq));

}



static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
@@ -324,7 +313,8 @@ static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribu 
	struct drm_i915_private *dev_priv = to_i915(minor->dev);



	return snprintf(buf, PAGE_SIZE, "%d\n",

			intel_gpu_freq(dev_priv, dev_priv->rps.boost_freq));

			intel_gpu_freq(dev_priv,

				       dev_priv->rps.boost_freq));

}



static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
@@ -360,9 +350,9 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev, 
	struct drm_device *dev = minor->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);



	return snprintf(buf, PAGE_SIZE,

			"%d\n",

			intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));

	return snprintf(buf, PAGE_SIZE, "%d\n",

			intel_gpu_freq(dev_priv,

				       dev_priv->rps.efficient_freq));

}



static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
@@ -370,15 +360,10 @@ static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute 
	struct drm_minor *minor = dev_to_drm_minor(kdev);

	struct drm_device *dev = minor->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	mutex_lock(&dev_priv->rps.hw_lock);

	ret = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);

	mutex_unlock(&dev_priv->rps.hw_lock);



	return snprintf(buf, PAGE_SIZE, "%d\n", ret);

	return snprintf(buf, PAGE_SIZE, "%d\n",

			intel_gpu_freq(dev_priv,

				       dev_priv->rps.max_freq_softlimit));

}



static ssize_t gt_max_freq_mhz_store(struct device *kdev,
@@ -395,8 +380,6 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, 
	if (ret)

		return ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	intel_runtime_pm_get(dev_priv);



	mutex_lock(&dev_priv->rps.hw_lock);
@@ -438,15 +421,10 @@ static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute 
	struct drm_minor *minor = dev_to_drm_minor(kdev);

	struct drm_device *dev = minor->dev;

	struct drm_i915_private *dev_priv = to_i915(dev);

	int ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	mutex_lock(&dev_priv->rps.hw_lock);

	ret = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);

	mutex_unlock(&dev_priv->rps.hw_lock);



	return snprintf(buf, PAGE_SIZE, "%d\n", ret);

	return snprintf(buf, PAGE_SIZE, "%d\n",

			intel_gpu_freq(dev_priv,

				       dev_priv->rps.min_freq_softlimit));

}



static ssize_t gt_min_freq_mhz_store(struct device *kdev,
@@ -463,8 +441,6 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, 
	if (ret)

		return ret;



	flush_delayed_work(&dev_priv->rps.delayed_resume_work);



	intel_runtime_pm_get(dev_priv);



	mutex_lock(&dev_priv->rps.hw_lock);