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Commit 6205d158 authored by Ben Dooks's avatar Ben Dooks Committed by Russell King
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[ARM] 3009/1: S3C2410 - io.h offsets too large for LDRH/STRH



Patch from Ben Dooks

The __inwc/__outwc calls are capable of creating
LDRH and STRH instructions with offsets over 8bits
as GCC does not have a constraint for an 8bit
offset.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 13b1f64c
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+42 −16
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@
 *  06-Dec-1997	RMK	Created.
 *  02-Sep-2003 BJD	Modified for S3C2410
 *  10-Mar-2005 LCVR	Changed S3C2410_VA to S3C24XX_VA
 *
 *  13-Oct-2005 BJD	Fixed problems with LDRH/STRH offset range
 */

#ifndef __ASM_ARM_ARCH_IO_H
@@ -117,11 +117,23 @@ DECLARE_IO(int,l,"")
#define __outwc(value,port)						\
({									\
	unsigned long v = value;					\
	if (__PORT_PCIO((port)))					\
	if (__PORT_PCIO((port))) {					\
		if ((port) < 256 && (port) > -256)			\
			__asm__ __volatile__(				\
			"strh	%0, [%1, %2]	@ outwc"		\
			: : "r" (v), "r" (PCIO_BASE), "Jr" ((port)));	\
		else if ((port) > 0)					\
			__asm__ __volatile__(				\
			"strh	%0, [%1, %2]	@ outwc"		\
			: : "r" (v),					\
			    "r" (PCIO_BASE + ((port) & ~0xff)),		\
			     "Jr" (((port) & 0xff)));			\
		else							\
			__asm__ __volatile__(				\
			"strh	%0, [%1, #0]	@ outwc"		\
			: : "r" (v),					\
			    "r" (PCIO_BASE + (port)));			\
	} else								\
		__asm__ __volatile__(					\
		"strh	%0, [%1, #0]	@ outwc"			\
		: : "r" (v), "r" ((port)));				\
@@ -130,11 +142,25 @@ DECLARE_IO(int,l,"")
#define __inwc(port)							\
({									\
	unsigned short result;						\
	if (__PORT_PCIO((port)))					\
	if (__PORT_PCIO((port))) {					\
		if ((port) < 256 && (port) > -256 )			\
			__asm__ __volatile__(				\
			"ldrh	%0, [%1, %2]	@ inwc"			\
		: "=r" (result) : "r" (PCIO_BASE), "Jr" ((port)));	\
			: "=r" (result)					\
			: "r" (PCIO_BASE),				\
			  "Jr" ((port)));				\
		else if ((port) > 0)					\
			__asm__ __volatile__(				\
			"ldrh	%0, [%1, %2]	@ inwc"			\
			: "=r" (result)					\
			: "r" (PCIO_BASE + ((port) & ~0xff)),		\
			  "Jr" (((port) & 0xff)));			\
		else							\
			__asm__ __volatile__(				\
			"ldrh	%0, [%1, #0]	@ inwc"			\
			: "=r" (result)					\
			: "r" (PCIO_BASE + ((port))));			\
	} else								\
		__asm__ __volatile__(					\
		"ldrh	%0, [%1, #0]	@ inwc"				\
		: "=r" (result) : "r" ((port)));			\