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Commit 61f838c7 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Arnd Bergmann
Browse files

ARM: dts: uniphier: add reference clock nodes 



Add master clock nodes generated by crystal oscillators.

  PH1-sLD3, PH1-LD4: 24.576 MHz
  PH1-Pro4, ProXstream2: 25.000 MHz
  PH1-Pro5: 20.000 MHz

Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 14bae133

arch/arm/boot/dts/uniphier-common32.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -45,6 +45,13 @@ 
/include/ "skeleton.dtsi"



/ {

	clocks {

		refclk: ref {

			#clock-cells = <0>;

			compatible = "fixed-clock";

		};

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

arch/arm/boot/dts/uniphier-ph1-ld4.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -173,6 +173,10 @@ 


};



&refclk {

	clock-frequency = <24576000>;

};



&serial3 {

	interrupts = <0 29 4>;

};

arch/arm/boot/dts/uniphier-ph1-pro4.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -195,6 +195,10 @@ 
	};

};



&refclk {

	clock-frequency = <25000000>;

};



&pinctrl {

	compatible = "socionext,ph1-pro4-pinctrl", "syscon";

};

arch/arm/boot/dts/uniphier-ph1-pro5.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -189,6 +189,10 @@ 
	};

};



&refclk {

	clock-frequency = <20000000>;

};



&pinctrl {

	compatible = "socionext,ph1-pro5-pinctrl", "syscon";

};

arch/arm/boot/dts/uniphier-ph1-sld3.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -68,6 +68,12 @@ 
	};



	clocks {

		refclk: ref {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <24576000>;

		};



		arm_timer_clk: arm_timer_clk {

			#clock-cells = <0>;

			compatible = "fixed-clock";