Loading hal/wifi3.0/hal_srng.c +2 −2 Original line number Diff line number Diff line Loading @@ -663,7 +663,7 @@ static void hal_reg_write_enqueue(struct hal_soc *hal_soc, uint32_t write_idx; if (srng->reg_write_in_progress) { hal_verbose_debug("Already in progress srng ring id 0x%x addr 0x%x val %u", hal_verbose_debug("Already in progress srng ring id 0x%x addr 0x%pK val %u", srng->ring_id, addr, value); qdf_atomic_inc(&hal_soc->stats.wstats.coalesces); srng->wstats.coalesces++; Loading Loading @@ -715,7 +715,7 @@ static void hal_reg_write_enqueue(struct hal_soc *hal_soc, srng->reg_write_in_progress = true; qdf_atomic_inc(&hal_soc->active_work_cnt); hal_verbose_debug("write_idx %u srng ring id 0x%x addr 0x%x val %u", hal_verbose_debug("write_idx %u srng ring id 0x%x addr 0x%pK val %u", write_idx, srng->ring_id, addr, value); qdf_queue_work(hal_soc->qdf_dev, hal_soc->reg_write_wq, Loading hal/wifi3.0/qca6490/hal_6490.c +4 −0 Original line number Diff line number Diff line Loading @@ -1874,7 +1874,11 @@ struct hal_hw_srng_config hw_srng_table_6490[] = { }, { /* WBM2SW_RELEASE */ .start_ring_id = HAL_SRNG_WBM2SW0_RELEASE, #ifdef CONFIG_PLD_PCIE_FW_SIM .max_rings = 5, #else .max_rings = 4, #endif .entry_size = sizeof(struct wbm_release_ring) >> 2, .lmac_ring = FALSE, .ring_dir = HAL_SRNG_DST_RING, Loading hif/inc/hif.h +12 −0 Original line number Diff line number Diff line Loading @@ -322,6 +322,7 @@ enum hif_event_type { HIF_EVENT_BH_SCHED, HIF_EVENT_SRNG_ACCESS_START, HIF_EVENT_SRNG_ACCESS_END, /* Do check hif_hist_skip_event_record when adding new events */ }; /** Loading Loading @@ -368,6 +369,16 @@ struct hif_event_record { enum hif_event_type type; }; /** * struct hif_event_misc - history related misc info * @last_irq_index: last irq event index in history * @last_irq_ts: last irq timestamp */ struct hif_event_misc { int32_t last_irq_index; uint64_t last_irq_ts; }; /** * struct hif_event_history - history for one interrupt group * @index: index to store new event Loading @@ -378,6 +389,7 @@ struct hif_event_record { */ struct hif_event_history { qdf_atomic_t index; struct hif_event_misc misc; struct hif_event_record event[HIF_EVENT_HIST_MAX]; }; Loading hif/src/ce/ce_internal.h +1 −0 Original line number Diff line number Diff line Loading @@ -579,6 +579,7 @@ struct hif_ce_desc_event { int index; enum hif_ce_event_type type; uint64_t time; int cpu_id; #ifdef HELIUMPLUS union ce_desc descriptor; #else Loading hif/src/ce/ce_service.c +1 −0 Original line number Diff line number Diff line Loading @@ -210,6 +210,7 @@ void hif_record_ce_desc_event(struct hif_softc *scn, int ce_id, event->type = type; event->time = qdf_get_log_timestamp(); event->cpu_id = qdf_get_cpu(); if (descriptor) qdf_mem_copy(&event->descriptor, descriptor, Loading Loading
hal/wifi3.0/hal_srng.c +2 −2 Original line number Diff line number Diff line Loading @@ -663,7 +663,7 @@ static void hal_reg_write_enqueue(struct hal_soc *hal_soc, uint32_t write_idx; if (srng->reg_write_in_progress) { hal_verbose_debug("Already in progress srng ring id 0x%x addr 0x%x val %u", hal_verbose_debug("Already in progress srng ring id 0x%x addr 0x%pK val %u", srng->ring_id, addr, value); qdf_atomic_inc(&hal_soc->stats.wstats.coalesces); srng->wstats.coalesces++; Loading Loading @@ -715,7 +715,7 @@ static void hal_reg_write_enqueue(struct hal_soc *hal_soc, srng->reg_write_in_progress = true; qdf_atomic_inc(&hal_soc->active_work_cnt); hal_verbose_debug("write_idx %u srng ring id 0x%x addr 0x%x val %u", hal_verbose_debug("write_idx %u srng ring id 0x%x addr 0x%pK val %u", write_idx, srng->ring_id, addr, value); qdf_queue_work(hal_soc->qdf_dev, hal_soc->reg_write_wq, Loading
hal/wifi3.0/qca6490/hal_6490.c +4 −0 Original line number Diff line number Diff line Loading @@ -1874,7 +1874,11 @@ struct hal_hw_srng_config hw_srng_table_6490[] = { }, { /* WBM2SW_RELEASE */ .start_ring_id = HAL_SRNG_WBM2SW0_RELEASE, #ifdef CONFIG_PLD_PCIE_FW_SIM .max_rings = 5, #else .max_rings = 4, #endif .entry_size = sizeof(struct wbm_release_ring) >> 2, .lmac_ring = FALSE, .ring_dir = HAL_SRNG_DST_RING, Loading
hif/inc/hif.h +12 −0 Original line number Diff line number Diff line Loading @@ -322,6 +322,7 @@ enum hif_event_type { HIF_EVENT_BH_SCHED, HIF_EVENT_SRNG_ACCESS_START, HIF_EVENT_SRNG_ACCESS_END, /* Do check hif_hist_skip_event_record when adding new events */ }; /** Loading Loading @@ -368,6 +369,16 @@ struct hif_event_record { enum hif_event_type type; }; /** * struct hif_event_misc - history related misc info * @last_irq_index: last irq event index in history * @last_irq_ts: last irq timestamp */ struct hif_event_misc { int32_t last_irq_index; uint64_t last_irq_ts; }; /** * struct hif_event_history - history for one interrupt group * @index: index to store new event Loading @@ -378,6 +389,7 @@ struct hif_event_record { */ struct hif_event_history { qdf_atomic_t index; struct hif_event_misc misc; struct hif_event_record event[HIF_EVENT_HIST_MAX]; }; Loading
hif/src/ce/ce_internal.h +1 −0 Original line number Diff line number Diff line Loading @@ -579,6 +579,7 @@ struct hif_ce_desc_event { int index; enum hif_ce_event_type type; uint64_t time; int cpu_id; #ifdef HELIUMPLUS union ce_desc descriptor; #else Loading
hif/src/ce/ce_service.c +1 −0 Original line number Diff line number Diff line Loading @@ -210,6 +210,7 @@ void hif_record_ce_desc_event(struct hif_softc *scn, int ce_id, event->type = type; event->time = qdf_get_log_timestamp(); event->cpu_id = qdf_get_cpu(); if (descriptor) qdf_mem_copy(&event->descriptor, descriptor, Loading