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Commit 6173040f authored by Boyuan Zhang's avatar Boyuan Zhang Committed by Alex Deucher
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drm/amdgpu: add vcn jpeg ib test 



Add an ib test for vcn jpeg.

Signed-off-by: default avatarBoyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b1d37606

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c

+86 −0
Original line number Original line Diff line number Diff line
@@ -618,3 +618,89 @@ int amdgpu_vcn_jpeg_ring_test_ring(struct amdgpu_ring *ring) 




	return r;

	return r;

}

}



static int amdgpu_vcn_jpeg_set_reg(struct amdgpu_ring *ring, uint32_t handle,

		struct dma_fence **fence)

{

	struct amdgpu_device *adev = ring->adev;

	struct amdgpu_job *job;

	struct amdgpu_ib *ib;

	struct dma_fence *f = NULL;

	const unsigned ib_size_dw = 16;

	int i, r;



	r = amdgpu_job_alloc_with_ib(ring->adev, ib_size_dw * 4, &job);

	if (r)

		return r;



	ib = &job->ibs[0];



	ib->ptr[0] = PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_PITCH), 0, 0, PACKETJ_TYPE0);

	ib->ptr[1] = 0xDEADBEEF;

	for (i = 2; i < 16; i += 2) {

		ib->ptr[i] = PACKETJ(0, 0, 0, PACKETJ_TYPE6);

		ib->ptr[i+1] = 0;

	}

	ib->length_dw = 16;



	r = amdgpu_ib_schedule(ring, 1, ib, NULL, &f);

	job->fence = dma_fence_get(f);

	if (r)

		goto err;



	amdgpu_job_free(job);

	if (fence)

		*fence = dma_fence_get(f);

	dma_fence_put(f);



	return 0;



err:

	amdgpu_job_free(job);

	return r;

}



int amdgpu_vcn_jpeg_ring_test_ib(struct amdgpu_ring *ring, long timeout)

{

	struct amdgpu_device *adev = ring->adev;

	uint32_t tmp = 0;

	unsigned i;

	struct dma_fence *fence = NULL;

	long r = 0;



	r = amdgpu_vcn_jpeg_set_reg(ring, 1, &fence);

	if (r) {

		DRM_ERROR("amdgpu: failed to set jpeg register (%ld).\n", r);

		goto error;

	}



	r = dma_fence_wait_timeout(fence, false, timeout);

	if (r == 0) {

		DRM_ERROR("amdgpu: IB test timed out.\n");

		r = -ETIMEDOUT;

		goto error;

	} else if (r < 0) {

		DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);

		goto error;

	} else

		r = 0;



	for (i = 0; i < adev->usec_timeout; i++) {

		tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_JPEG_PITCH));

		if (tmp == 0xDEADBEEF)

			break;

		DRM_UDELAY(1);

	}



	if (i < adev->usec_timeout)

		DRM_DEBUG("ib test on ring %d succeeded\n", ring->idx);

	else {

		DRM_ERROR("ib test failed (0x%08X)\n", tmp);

		r = -EINVAL;

	}



	dma_fence_put(fence);



error:

	return r;

}

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -85,5 +85,6 @@ int amdgpu_vcn_enc_ring_test_ring(struct amdgpu_ring *ring); 
int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout);

int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout);





int amdgpu_vcn_jpeg_ring_test_ring(struct amdgpu_ring *ring);

int amdgpu_vcn_jpeg_ring_test_ring(struct amdgpu_ring *ring);

int amdgpu_vcn_jpeg_ring_test_ib(struct amdgpu_ring *ring, long timeout);





#endif
 
#endif

drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1713,7 +1713,7 @@ static const struct amdgpu_ring_funcs vcn_v1_0_jpeg_ring_vm_funcs = { 
	.emit_fence = vcn_v1_0_jpeg_ring_emit_fence,

	.emit_fence = vcn_v1_0_jpeg_ring_emit_fence,

	.emit_vm_flush = vcn_v1_0_jpeg_ring_emit_vm_flush,

	.emit_vm_flush = vcn_v1_0_jpeg_ring_emit_vm_flush,

	.test_ring = amdgpu_vcn_jpeg_ring_test_ring,

	.test_ring = amdgpu_vcn_jpeg_ring_test_ring,

	//.test_ib

	.test_ib = amdgpu_vcn_jpeg_ring_test_ib,

	.insert_nop = vcn_v1_0_jpeg_ring_nop,

	.insert_nop = vcn_v1_0_jpeg_ring_nop,

	.insert_start = vcn_v1_0_jpeg_ring_insert_start,

	.insert_start = vcn_v1_0_jpeg_ring_insert_start,

	.insert_end = vcn_v1_0_jpeg_ring_insert_end,

	.insert_end = vcn_v1_0_jpeg_ring_insert_end,