Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5f80e190 authored by Liu Ying's avatar Liu Ying Committed by Shawn Guo
Browse files

ARM: imx6q: Add GPR3 MIPI muxing control register field shift bits definition 



This patch adds a macro to define the GPR3 MIPI muxing control register field
shift bits.

Signed-off-by: default avatarLiu Ying <Ying.Liu@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent af321d2e

include/linux/mfd/syscon/imx6q-iomuxc-gpr.h

+1 −0
Original line number Diff line number Diff line
@@ -207,6 +207,7 @@ 
#define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI1	(0x1 << 6)

#define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI0	(0x2 << 6)

#define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI1	(0x3 << 6)

#define IMX6Q_GPR3_MIPI_MUX_CTL_SHIFT		4

#define IMX6Q_GPR3_MIPI_MUX_CTL_MASK		(0x3 << 4)

#define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI0	(0x0 << 4)

#define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1	(0x1 << 4)