Loading qcom/lito-cdp.dtsi +26 −0 Original line number Diff line number Diff line Loading @@ -75,3 +75,29 @@ "VA SWR_MIC6", "DMIC7_OUTPUT", "VA SWR_MIC7", "DMIC8_OUTPUT"; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; }; qcom/lito-mtp.dtsi +26 −0 Original line number Diff line number Diff line Loading @@ -3,3 +3,29 @@ &soc { }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; }; qcom/lito-qrd.dtsi +26 −0 Original line number Diff line number Diff line &soc { }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; }; qcom/lito.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1230,6 +1230,7 @@ lanes-per-direction = <2>; dev-ref-clk-freq = <0>; /* 19.2 MHz */ spm-level = <5>; clock-names = "core_clk", Loading Loading
qcom/lito-cdp.dtsi +26 −0 Original line number Diff line number Diff line Loading @@ -75,3 +75,29 @@ "VA SWR_MIC6", "DMIC7_OUTPUT", "VA SWR_MIC7", "DMIC8_OUTPUT"; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; };
qcom/lito-mtp.dtsi +26 −0 Original line number Diff line number Diff line Loading @@ -3,3 +3,29 @@ &soc { }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; };
qcom/lito-qrd.dtsi +26 −0 Original line number Diff line number Diff line &soc { }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-card"; vdda-phy-supply = <&pm8150_l5>; vdda-pll-supply = <&pm8150_l9>; vdda-phy-max-microamp = <90200>; vdda-pll-max-microamp = <19000>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&pm8150a_l7>; vccc-voltage-level = <2856000 2960000>; vccq2-supply = <&pm8150_s4>; vcc-max-microamp = <800000>; vccq2-max-microamp = <800000>; qcom,vddp-ref-clk-supply = <&pm8150_l9>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; };
qcom/lito.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1230,6 +1230,7 @@ lanes-per-direction = <2>; dev-ref-clk-freq = <0>; /* 19.2 MHz */ spm-level = <5>; clock-names = "core_clk", Loading