Commit 5e32033e authored Jan 30, 2015 by James Hogan Committed by Ralf Baechle Jan 30, 2015

MIPS: mipsregs.h: Add write_32bit_cp1_register()



Add a write_32bit_cp1_register() macro to compliment the
read_32bit_cp1_register() macro. This is to abstract whether .set
hardfloat needs to be used based on GAS_HAS_SET_HARDFLOAT.

The implementation of _read_32bit_cp1_register() .sets mips1 due to
failure of gas v2.19 to assemble cfc1 for Octeon (see commit
25c30003 ("MIPS: Override assembler target architecture for
octeon.")). I haven't copied this over to _write_32bit_cp1_register() as
I'm uncertain whether it applies to ctc1 too, or whether anybody cares
about that version of binutils any longer.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9172/


Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent c7754e75

arch/mips/include/asm/mipsregs.h

+15 −0

Original line number	Diff line number	Diff line
		@@ -1386,12 +1386,27 @@ do { \
		__res; \
		})

		#define _write_32bit_cp1_register(dest, val, gas_hardfloat) \
		do { \
		__asm__ __volatile__( \
		" .set push \n" \
		" .set reorder \n" \
		" "STR(gas_hardfloat)" \n" \
		" ctc1 %0,"STR(dest)" \n" \
		" .set pop \n" \
		: : "r" (val)); \
		} while (0)

		#ifdef GAS_HAS_SET_HARDFLOAT
		#define read_32bit_cp1_register(source) \
		_read_32bit_cp1_register(source, .set hardfloat)
		#define write_32bit_cp1_register(dest, val) \
		_write_32bit_cp1_register(dest, val, .set hardfloat)
		#else
		#define read_32bit_cp1_register(source) \
		_read_32bit_cp1_register(source, )
		#define write_32bit_cp1_register(dest, val) \
		_write_32bit_cp1_register(dest, val, )
		#endif

		#ifdef HAVE_AS_DSP