Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5d449e4b authored by Maxime Ripard's avatar Maxime Ripard Committed by Greg Kroah-Hartman
Browse files

ARM: AT91: Add the ADC clock to the sam9x5 SoC file

parent 4a5920e8
Loading
Loading
Loading
Loading
+6 −0
Original line number Original line Diff line number Diff line
@@ -120,6 +120,11 @@ static struct clk adc_clk = {
	.pmc_mask	= 1 << AT91SAM9X5_ID_ADC,
	.pmc_mask	= 1 << AT91SAM9X5_ID_ADC,
	.type	= CLK_TYPE_PERIPHERAL,
	.type	= CLK_TYPE_PERIPHERAL,
};
};
static struct clk adc_op_clk = {
	.name		= "adc_op_clk",
	.type		= CLK_TYPE_PERIPHERAL,
	.rate_hz	= 5000000,
};
static struct clk dma0_clk = {
static struct clk dma0_clk = {
	.name		= "dma0_clk",
	.name		= "dma0_clk",
	.pmc_mask	= 1 << AT91SAM9X5_ID_DMA0,
	.pmc_mask	= 1 << AT91SAM9X5_ID_DMA0,
@@ -205,6 +210,7 @@ static struct clk *periph_clocks[] __initdata = {
	&tcb0_clk,
	&tcb0_clk,
	&pwm_clk,
	&pwm_clk,
	&adc_clk,
	&adc_clk,
	&adc_op_clk,
	&dma0_clk,
	&dma0_clk,
	&dma1_clk,
	&dma1_clk,
	&uhphs_clk,
	&uhphs_clk,