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Commit 5d39525a authored by Jeff McGee's avatar Jeff McGee Committed by Daniel Vetter
Browse files

drm/i915: Split-up SSEU device status by platform 



Signed-off-by: default avatarJeff McGee <jeff.mcgee@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent dead16e2

drivers/gpu/drm/i915/i915_debugfs.c

+100 −72
Original line number Diff line number Diff line
@@ -4470,36 +4470,18 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops, 
			i915_cache_sharing_get, i915_cache_sharing_set,

			"%llu\n");



static int i915_sseu_status(struct seq_file *m, void *unused)

struct sseu_dev_status {

	unsigned int slice_total;

	unsigned int subslice_total;

	unsigned int subslice_per_slice;

	unsigned int eu_total;

	unsigned int eu_per_subslice;

};



static void cherryview_sseu_device_status(struct drm_device *dev,

					  struct sseu_dev_status *stat)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	unsigned int s_tot = 0, ss_tot = 0, ss_per = 0, eu_tot = 0, eu_per = 0;



	if ((INTEL_INFO(dev)->gen < 8) || IS_BROADWELL(dev))

		return -ENODEV;



	seq_puts(m, "SSEU Device Info\n");

	seq_printf(m, "  Available Slice Total: %u\n",

		   INTEL_INFO(dev)->slice_total);

	seq_printf(m, "  Available Subslice Total: %u\n",

		   INTEL_INFO(dev)->subslice_total);

	seq_printf(m, "  Available Subslice Per Slice: %u\n",

		   INTEL_INFO(dev)->subslice_per_slice);

	seq_printf(m, "  Available EU Total: %u\n",

		   INTEL_INFO(dev)->eu_total);

	seq_printf(m, "  Available EU Per Subslice: %u\n",

		   INTEL_INFO(dev)->eu_per_subslice);

	seq_printf(m, "  Has Slice Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_slice_pg));

	seq_printf(m, "  Has Subslice Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_subslice_pg));

	seq_printf(m, "  Has EU Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_eu_pg));



	seq_puts(m, "SSEU Device Status\n");

	if (IS_CHERRYVIEW(dev)) {

	const int ss_max = 2;

	int ss;

	u32 sig1[ss_max], sig2[ss_max];
@@ -4516,17 +4498,22 @@ static int i915_sseu_status(struct seq_file *m, void *unused) 
			/* skip disabled subslice */

			continue;



			s_tot = 1;

			ss_per++;

		stat->slice_total = 1;

		stat->subslice_per_slice++;

		eu_cnt = ((sig1[ss] & CHV_EU08_PG_ENABLE) ? 0 : 2) +

			 ((sig1[ss] & CHV_EU19_PG_ENABLE) ? 0 : 2) +

			 ((sig1[ss] & CHV_EU210_PG_ENABLE) ? 0 : 2) +

			 ((sig2[ss] & CHV_EU311_PG_ENABLE) ? 0 : 2);

			eu_tot += eu_cnt;

			eu_per = max(eu_per, eu_cnt);

		stat->eu_total += eu_cnt;

		stat->eu_per_subslice = max(stat->eu_per_subslice, eu_cnt);

	}

		ss_tot = ss_per;

	} else if (IS_SKYLAKE(dev)) {

	stat->subslice_total = stat->subslice_per_slice;

}



static void gen9_sseu_device_status(struct drm_device *dev,

				    struct sseu_dev_status *stat)

{

	struct drm_i915_private *dev_priv = dev->dev_private;

	const int s_max = 3, ss_max = 4;

	int s, ss;

	u32 s_reg[s_max], eu_reg[2*s_max], eu_mask[2];
@@ -4554,24 +4541,65 @@ static int i915_sseu_status(struct seq_file *m, void *unused) 
			/* skip disabled slice */

			continue;



			s_tot++;

			ss_per = INTEL_INFO(dev)->subslice_per_slice;

			ss_tot += ss_per;

		stat->slice_total++;

		stat->subslice_per_slice = INTEL_INFO(dev)->subslice_per_slice;

		stat->subslice_total += stat->subslice_per_slice;

		for (ss = 0; ss < ss_max; ss++) {

			unsigned int eu_cnt;



			eu_cnt = 2 * hweight32(eu_reg[2*s + ss/2] &

					       eu_mask[ss%2]);

				eu_tot += eu_cnt;

				eu_per = max(eu_per, eu_cnt);

			stat->eu_total += eu_cnt;

			stat->eu_per_subslice = max(stat->eu_per_subslice,

						    eu_cnt);

		}

	}

}

	seq_printf(m, "  Enabled Slice Total: %u\n", s_tot);

	seq_printf(m, "  Enabled Subslice Total: %u\n", ss_tot);

	seq_printf(m, "  Enabled Subslice Per Slice: %u\n", ss_per);

	seq_printf(m, "  Enabled EU Total: %u\n", eu_tot);

	seq_printf(m, "  Enabled EU Per Subslice: %u\n", eu_per);



static int i915_sseu_status(struct seq_file *m, void *unused)

{

	struct drm_info_node *node = (struct drm_info_node *) m->private;

	struct drm_device *dev = node->minor->dev;

	struct sseu_dev_status stat;



	if ((INTEL_INFO(dev)->gen < 8) || IS_BROADWELL(dev))

		return -ENODEV;



	seq_puts(m, "SSEU Device Info\n");

	seq_printf(m, "  Available Slice Total: %u\n",

		   INTEL_INFO(dev)->slice_total);

	seq_printf(m, "  Available Subslice Total: %u\n",

		   INTEL_INFO(dev)->subslice_total);

	seq_printf(m, "  Available Subslice Per Slice: %u\n",

		   INTEL_INFO(dev)->subslice_per_slice);

	seq_printf(m, "  Available EU Total: %u\n",

		   INTEL_INFO(dev)->eu_total);

	seq_printf(m, "  Available EU Per Subslice: %u\n",

		   INTEL_INFO(dev)->eu_per_subslice);

	seq_printf(m, "  Has Slice Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_slice_pg));

	seq_printf(m, "  Has Subslice Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_subslice_pg));

	seq_printf(m, "  Has EU Power Gating: %s\n",

		   yesno(INTEL_INFO(dev)->has_eu_pg));



	seq_puts(m, "SSEU Device Status\n");

	memset(&stat, 0, sizeof(stat));

	if (IS_CHERRYVIEW(dev)) {

		cherryview_sseu_device_status(dev, &stat);

	} else if (IS_SKYLAKE(dev)) {

		gen9_sseu_device_status(dev, &stat);

	}

	seq_printf(m, "  Enabled Slice Total: %u\n",

		   stat.slice_total);

	seq_printf(m, "  Enabled Subslice Total: %u\n",

		   stat.subslice_total);

	seq_printf(m, "  Enabled Subslice Per Slice: %u\n",

		   stat.subslice_per_slice);

	seq_printf(m, "  Enabled EU Total: %u\n",

		   stat.eu_total);

	seq_printf(m, "  Enabled EU Per Subslice: %u\n",

		   stat.eu_per_subslice);



	return 0;

}