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Commit 5ce5fe14 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Michael Ellerman
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powerpc/mm/radix: Improve _tlbiel_pid to be usable for PWC flushes 



The PWC flush only needs a single set call, just like the
full (RIC=2) flush.

This will allow us to get rid of the dedicated _tlbiel_pwc()

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 75f327c6

arch/powerpc/mm/tlb-radix.c

+7 −4
Original line number Diff line number Diff line
@@ -54,12 +54,15 @@ static inline void _tlbiel_pid(unsigned long pid, unsigned long ric) 
	 */

	__tlbiel_pid(pid, 0, ric);



	if (ric == RIC_FLUSH_ALL)

		/* For the remaining sets, just flush the TLB */

		ric = RIC_FLUSH_TLB;

	/* For PWC, only one flush is needed */

	if (ric == RIC_FLUSH_PWC) {

		asm volatile("ptesync": : :"memory");

		return;

	}



	/* For the remaining sets, just flush the TLB */

	for (set = 1; set < POWER9_TLB_SETS_RADIX ; set++)

		__tlbiel_pid(pid, set, ric);

		__tlbiel_pid(pid, set, RIC_FLUSH_TLB);



	asm volatile("ptesync": : :"memory");

	asm volatile(PPC_INVALIDATE_ERAT "; isync" : : :"memory");