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Commit 5cc8afcb authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Simon Horman
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ARM: shmobile: r8a7779 dtsi: Correct #address-cells/#size-cells for clocks 



Warning (ranges_format): /clocks has empty "ranges" property but its #address-cells (2) differs from / (1)
Warning (ranges_format): /clocks has empty "ranges" property but its #size-cells (2) differs from / (1)

As r8a7779 doesn't support LPAE, change #address-cells and #size-cells from
"<2>" to "<1>", and update the affected "reg" properties to fix this.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 2909b874

arch/arm/boot/dts/r8a7779.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -284,8 +284,8 @@ 
	};



	clocks {

		#address-cells = <2>;

		#size-cells = <2>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		/* External root clock */
@@ -300,7 +300,7 @@ 
		/* Special CPG clocks */

		cpg_clocks: clocks@ffc80000 {

			compatible = "renesas,r8a7779-cpg-clocks";

			reg = <0 0xffc80000 0 0x30>;

			reg = <0xffc80000 0x30>;

			clocks = <&extal_clk>;

			#clock-cells = <1>;

			clock-output-names = "plla", "z", "zs", "s",
@@ -345,7 +345,7 @@ 
		mstp0_clks: clocks@ffc80030 {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0 0xffc80030 0 4>;

			reg = <0xffc80030 4>;

			clocks = <&cpg_clocks R8A7779_CLK_S>,

			         <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,
@@ -382,7 +382,7 @@ 
		mstp1_clks: clocks@ffc80034 {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0 0xffc80034 0 4>, <0 0xffc80044 0 4>;

			reg = <0xffc80034 4>, <0xffc80044 4>;

			clocks = <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>,
@@ -411,7 +411,7 @@ 
		mstp3_clks: clocks@ffc8003c {

			compatible = "renesas,r8a7779-mstp-clocks",

			             "renesas,cpg-mstp-clocks";

			reg = <0 0xffc8003c 0 4>;

			reg = <0xffc8003c 4>;

			clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,

				 <&s4_clk>, <&s4_clk>;

			#clock-cells = <1>;