Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5c632e22 authored by Maciej Purski's avatar Maciej Purski Committed by Andrzej Hajda
Browse files

drm/bridge/sii8620: add DVI mode support 



If the sink device is in HDMI mode, enable infoframe interrupt in scdt
irq handle function else call start_video function immediately, because
in DVI mode, there is no infoframe interrupt provided.

Rename start_hdmi function to start_video and get rid of the old
start_video function. In start_video, if the sink is DVI and mode is
MHL1 or MHl2, write appropriate values to registers else the path
should remain the same as in HDMI mode.

Signed-off-by: default avatarMaciej Purski <m.purski@samsung.com>
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1510224822-7732-1-git-send-email-m.purski@samsung.com
parent e7c2e4d3

drivers/gpu/drm/bridge/sil-sii8620.c

+18 −18
Original line number Original line Diff line number Diff line
@@ -1169,8 +1169,18 @@ static void sii8620_set_infoframes(struct sii8620 *ctx) 
	sii8620_write_buf(ctx, REG_TPI_INFO_B0, buf, ret);

	sii8620_write_buf(ctx, REG_TPI_INFO_B0, buf, ret);

}

}





static void sii8620_start_hdmi(struct sii8620 *ctx)

static void sii8620_start_video(struct sii8620 *ctx)

{

{

	if (!sii8620_is_mhl3(ctx))

		sii8620_stop_video(ctx);



	if (ctx->sink_type == SINK_DVI && !sii8620_is_mhl3(ctx)) {

		sii8620_write(ctx, REG_RX_HDMI_CTRL2,

			      VAL_RX_HDMI_CTRL2_DEFVAL);

		sii8620_write(ctx, REG_TPI_SC, 0);

		return;

	}



	sii8620_write_seq_static(ctx,

	sii8620_write_seq_static(ctx,

		REG_RX_HDMI_CTRL2, VAL_RX_HDMI_CTRL2_DEFVAL

		REG_RX_HDMI_CTRL2, VAL_RX_HDMI_CTRL2_DEFVAL

			| BIT_RX_HDMI_CTRL2_USE_AV_MUTE,

			| BIT_RX_HDMI_CTRL2_USE_AV_MUTE,
@@ -1229,21 +1239,6 @@ static void sii8620_start_hdmi(struct sii8620 *ctx) 
	sii8620_set_infoframes(ctx);

	sii8620_set_infoframes(ctx);

}

}





static void sii8620_start_video(struct sii8620 *ctx)

{

	if (!sii8620_is_mhl3(ctx))

		sii8620_stop_video(ctx);



	switch (ctx->sink_type) {

	case SINK_HDMI:

		sii8620_start_hdmi(ctx);

		break;

	case SINK_DVI:

	default:

		break;

	}

}



static void sii8620_disable_hpd(struct sii8620 *ctx)

static void sii8620_disable_hpd(struct sii8620 *ctx)

{

{

	sii8620_setbits(ctx, REG_EDID_CTRL, BIT_EDID_CTRL_EDID_PRIME_VALID, 0);

	sii8620_setbits(ctx, REG_EDID_CTRL, BIT_EDID_CTRL_EDID_PRIME_VALID, 0);
@@ -1945,8 +1940,13 @@ static void sii8620_irq_scdt(struct sii8620 *ctx) 
	if (stat & BIT_INTR_SCDT_CHANGE) {

	if (stat & BIT_INTR_SCDT_CHANGE) {

		u8 cstat = sii8620_readb(ctx, REG_TMDS_CSTAT_P3);

		u8 cstat = sii8620_readb(ctx, REG_TMDS_CSTAT_P3);





		if (cstat & BIT_TMDS_CSTAT_P3_SCDT)

		if (cstat & BIT_TMDS_CSTAT_P3_SCDT) {

			if (ctx->sink_type == SINK_HDMI)

				/* enable infoframe interrupt */

				sii8620_scdt_high(ctx);

				sii8620_scdt_high(ctx);

			else

				sii8620_start_video(ctx);

		}

	}

	}





	sii8620_write(ctx, REG_INTR5, stat);

	sii8620_write(ctx, REG_INTR5, stat);