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Commit 5c04b57f authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Olof Johansson
Browse files

ARM: socfpga: Enable soft reset 



Enable a cold or warm reset to the HW from userspace.

Also fix a few sparse errors:

warning: symbol 'sys_manager_base_addr' was not declared. Should it be static?
warning: symbol 'rst_manager_base_addr' was not declared. Should it be static?

Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
Reviewed-by: default avatarPavel Machek <pavel@denx.de>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent a93216c9

arch/arm/mach-socfpga/core.h

+11 −0
Original line number Diff line number Diff line
@@ -20,12 +20,23 @@ 
#ifndef __MACH_CORE_H

#define __MACH_CORE_H



#define SOCFPGA_RSTMGR_CTRL	0x04

#define SOCFPGA_RSTMGR_MODPERRST	0x14

#define SOCFPGA_RSTMGR_BRGMODRST	0x1c



/* System Manager bits */

#define RSTMGR_CTRL_SWCOLDRSTREQ	0x1	/* Cold Reset */

#define RSTMGR_CTRL_SWWARMRSTREQ	0x2	/* Warm Reset */



extern void socfpga_secondary_startup(void);

extern void __iomem *socfpga_scu_base_addr;



extern void socfpga_init_clocks(void);

extern void socfpga_sysmgr_init(void);



extern void __iomem *sys_manager_base_addr;

extern void __iomem *rst_manager_base_addr;



extern struct smp_operations socfpga_smp_ops;

extern char secondary_trampoline, secondary_trampoline_end;

arch/arm/mach-socfpga/platsmp.c

+0 −3
Original line number Diff line number Diff line
@@ -30,9 +30,6 @@ 


#include "core.h"



extern void __iomem *sys_manager_base_addr;

extern void __iomem *rst_manager_base_addr;



static void __cpuinit socfpga_secondary_init(unsigned int cpu)

{

	/*

arch/arm/mach-socfpga/socfpga.c

+9 −1
Original line number Diff line number Diff line
@@ -87,7 +87,15 @@ static void __init socfpga_init_irq(void) 


static void socfpga_cyclone5_restart(char mode, const char *cmd)

{

	/* TODO: */

	u32 temp;



	temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);



	if (mode == 'h')

		temp |= RSTMGR_CTRL_SWCOLDRSTREQ;

	else

		temp |= RSTMGR_CTRL_SWWARMRSTREQ;

	writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL);

}



static void __init socfpga_cyclone5_init(void)