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Commit 5bdbc4be authored by Vipin Deep Kaur's avatar Vipin Deep Kaur
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ARM: dts: msm: Enable SMMU stage 1 for QUPv3 drivers on lito 

Enable SMMU stage 1 translation for QUPv3 drivers on lito.

Change-Id: Id4eb8051850ffd1a2a6a758e80646f96a5b8d94d
parent 9feae28f

qcom/lito-qupv3.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 
			<MSM_BUS_MASTER_QUP_0 MSM_BUS_SLAVE_EBI_CH0>;

		iommus = <&apps_smmu 0x4e3 0x0>;

		qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;

		qcom,iommu-dma = "bypass";

		qcom,iommu-dma = "atomic";

	};



	/* Debug UART Instance for RUMI platform */
@@ -307,7 +307,7 @@ 
			<MSM_BUS_MASTER_QUP_1 MSM_BUS_SLAVE_EBI_CH0>;

		iommus = <&apps_smmu 0x023 0x0>;

		qcom,iommu-dma-addr-pool = <0x40000000 0xc0000000>;

		qcom,iommu-dma = "bypass";

		qcom,iommu-dma = "atomic";

	};



	/* 2-wire UART */