Loading Documentation/cpu-freq/core.txt +2 −2 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ new - new frequency For details about OPP, see Documentation/power/opp.txt dev_pm_opp_init_cpufreq_table - cpufreq framework typically is initialized with cpufreq_frequency_table_cpuinfo which is provided with the list of cpufreq_table_validate_and_show() which is provided with the list of frequencies that are available for operation. This function provides a ready to use conversion routine to translate the OPP layer's internal information about the available frequencies into a format readily Loading @@ -110,7 +110,7 @@ dev_pm_opp_init_cpufreq_table - cpufreq framework typically is initialized with /* Do things */ r = dev_pm_opp_init_cpufreq_table(dev, &freq_table); if (!r) cpufreq_frequency_table_cpuinfo(policy, freq_table); cpufreq_table_validate_and_show(policy, freq_table); /* Do other things */ } Loading Documentation/cpu-freq/cpu-drivers.txt +4 −6 Original line number Diff line number Diff line Loading @@ -231,7 +231,7 @@ if you want to skip one entry in the table, set the frequency to CPUFREQ_ENTRY_INVALID. The entries don't need to be in ascending order. By calling cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy, By calling cpufreq_table_validate_and_show(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table); the cpuinfo.min_freq and cpuinfo.max_freq values are detected, and policy->min and policy->max are set to the same values. This is Loading @@ -244,14 +244,12 @@ policy->max, and all other criteria are met. This is helpful for the ->verify call. int cpufreq_frequency_table_target(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table, unsigned int target_freq, unsigned int relation, unsigned int *index); unsigned int relation); is the corresponding frequency table helper for the ->target stage. Just pass the values to this function, and the unsigned int index returns the number of the frequency table entry which contains stage. Just pass the values to this function, and this function returns the number of the frequency table entry which contains the frequency the CPU shall be set to. The following macros can be used as iterators over cpufreq_frequency_table: Loading arch/powerpc/platforms/cell/cpufreq_spudemand.c +34 −38 Original line number Diff line number Diff line Loading @@ -85,27 +85,21 @@ static void spu_gov_cancel_work(struct spu_gov_info_struct *info) cancel_delayed_work_sync(&info->work); } static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) static int spu_gov_start(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; struct spu_gov_info_struct *info, *affected_info; struct spu_gov_info_struct *info = &per_cpu(spu_gov_info, cpu); struct spu_gov_info_struct *affected_info; int i; int ret = 0; info = &per_cpu(spu_gov_info, cpu); switch (event) { case CPUFREQ_GOV_START: if (!cpu_online(cpu)) { printk(KERN_ERR "cpu %d is not online\n", cpu); ret = -EINVAL; break; return -EINVAL; } if (!policy->cur) { printk(KERN_ERR "no cpu specified in policy\n"); ret = -EINVAL; break; return -EINVAL; } /* initialize spu_gov_info for all affected cpus */ Loading @@ -119,9 +113,15 @@ static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) /* setup timer */ spu_gov_init_work(info); break; return 0; } static void spu_gov_stop(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; struct spu_gov_info_struct *info = &per_cpu(spu_gov_info, cpu); int i; case CPUFREQ_GOV_STOP: /* cancel timer */ spu_gov_cancel_work(info); Loading @@ -130,16 +130,12 @@ static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) info = &per_cpu(spu_gov_info, i); info->policy = NULL; } break; } return ret; } static struct cpufreq_governor spu_governor = { .name = "spudemand", .governor = spu_gov_govern, .start = spu_gov_start, .stop = spu_gov_stop, .owner = THIS_MODULE, }; Loading arch/x86/include/asm/topology.h +1 −11 Original line number Diff line number Diff line Loading @@ -25,16 +25,6 @@ #ifndef _ASM_X86_TOPOLOGY_H #define _ASM_X86_TOPOLOGY_H #ifdef CONFIG_X86_32 # ifdef CONFIG_SMP # define ENABLE_TOPO_DEFINES # endif #else # ifdef CONFIG_SMP # define ENABLE_TOPO_DEFINES # endif #endif /* * to preserve the visibility of NUMA_NO_NODE definition, * moved to there from here. May be used independent of Loading Loading @@ -123,7 +113,7 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu); #define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id) #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) #ifdef ENABLE_TOPO_DEFINES #ifdef CONFIG_SMP #define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu)) #define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu)) Loading arch/x86/kernel/cpu/intel.c +3 −4 Original line number Diff line number Diff line Loading @@ -300,15 +300,14 @@ static void intel_workarounds(struct cpuinfo_x86 *c) } /* * P4 Xeon errata 037 workaround. * P4 Xeon erratum 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { if (msr_set_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) { MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) { pr_info("CPU: C0 stepping P4 Xeon detected.\n"); pr_info("CPU: Disabling hardware prefetching (Errata 037)\n"); pr_info("CPU: Disabling hardware prefetching (Erratum 037)\n"); } } Loading Loading
Documentation/cpu-freq/core.txt +2 −2 Original line number Diff line number Diff line Loading @@ -96,7 +96,7 @@ new - new frequency For details about OPP, see Documentation/power/opp.txt dev_pm_opp_init_cpufreq_table - cpufreq framework typically is initialized with cpufreq_frequency_table_cpuinfo which is provided with the list of cpufreq_table_validate_and_show() which is provided with the list of frequencies that are available for operation. This function provides a ready to use conversion routine to translate the OPP layer's internal information about the available frequencies into a format readily Loading @@ -110,7 +110,7 @@ dev_pm_opp_init_cpufreq_table - cpufreq framework typically is initialized with /* Do things */ r = dev_pm_opp_init_cpufreq_table(dev, &freq_table); if (!r) cpufreq_frequency_table_cpuinfo(policy, freq_table); cpufreq_table_validate_and_show(policy, freq_table); /* Do other things */ } Loading
Documentation/cpu-freq/cpu-drivers.txt +4 −6 Original line number Diff line number Diff line Loading @@ -231,7 +231,7 @@ if you want to skip one entry in the table, set the frequency to CPUFREQ_ENTRY_INVALID. The entries don't need to be in ascending order. By calling cpufreq_frequency_table_cpuinfo(struct cpufreq_policy *policy, By calling cpufreq_table_validate_and_show(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table); the cpuinfo.min_freq and cpuinfo.max_freq values are detected, and policy->min and policy->max are set to the same values. This is Loading @@ -244,14 +244,12 @@ policy->max, and all other criteria are met. This is helpful for the ->verify call. int cpufreq_frequency_table_target(struct cpufreq_policy *policy, struct cpufreq_frequency_table *table, unsigned int target_freq, unsigned int relation, unsigned int *index); unsigned int relation); is the corresponding frequency table helper for the ->target stage. Just pass the values to this function, and the unsigned int index returns the number of the frequency table entry which contains stage. Just pass the values to this function, and this function returns the number of the frequency table entry which contains the frequency the CPU shall be set to. The following macros can be used as iterators over cpufreq_frequency_table: Loading
arch/powerpc/platforms/cell/cpufreq_spudemand.c +34 −38 Original line number Diff line number Diff line Loading @@ -85,27 +85,21 @@ static void spu_gov_cancel_work(struct spu_gov_info_struct *info) cancel_delayed_work_sync(&info->work); } static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) static int spu_gov_start(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; struct spu_gov_info_struct *info, *affected_info; struct spu_gov_info_struct *info = &per_cpu(spu_gov_info, cpu); struct spu_gov_info_struct *affected_info; int i; int ret = 0; info = &per_cpu(spu_gov_info, cpu); switch (event) { case CPUFREQ_GOV_START: if (!cpu_online(cpu)) { printk(KERN_ERR "cpu %d is not online\n", cpu); ret = -EINVAL; break; return -EINVAL; } if (!policy->cur) { printk(KERN_ERR "no cpu specified in policy\n"); ret = -EINVAL; break; return -EINVAL; } /* initialize spu_gov_info for all affected cpus */ Loading @@ -119,9 +113,15 @@ static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) /* setup timer */ spu_gov_init_work(info); break; return 0; } static void spu_gov_stop(struct cpufreq_policy *policy) { unsigned int cpu = policy->cpu; struct spu_gov_info_struct *info = &per_cpu(spu_gov_info, cpu); int i; case CPUFREQ_GOV_STOP: /* cancel timer */ spu_gov_cancel_work(info); Loading @@ -130,16 +130,12 @@ static int spu_gov_govern(struct cpufreq_policy *policy, unsigned int event) info = &per_cpu(spu_gov_info, i); info->policy = NULL; } break; } return ret; } static struct cpufreq_governor spu_governor = { .name = "spudemand", .governor = spu_gov_govern, .start = spu_gov_start, .stop = spu_gov_stop, .owner = THIS_MODULE, }; Loading
arch/x86/include/asm/topology.h +1 −11 Original line number Diff line number Diff line Loading @@ -25,16 +25,6 @@ #ifndef _ASM_X86_TOPOLOGY_H #define _ASM_X86_TOPOLOGY_H #ifdef CONFIG_X86_32 # ifdef CONFIG_SMP # define ENABLE_TOPO_DEFINES # endif #else # ifdef CONFIG_SMP # define ENABLE_TOPO_DEFINES # endif #endif /* * to preserve the visibility of NUMA_NO_NODE definition, * moved to there from here. May be used independent of Loading Loading @@ -123,7 +113,7 @@ extern const struct cpumask *cpu_coregroup_mask(int cpu); #define topology_physical_package_id(cpu) (cpu_data(cpu).phys_proc_id) #define topology_core_id(cpu) (cpu_data(cpu).cpu_core_id) #ifdef ENABLE_TOPO_DEFINES #ifdef CONFIG_SMP #define topology_core_cpumask(cpu) (per_cpu(cpu_core_map, cpu)) #define topology_sibling_cpumask(cpu) (per_cpu(cpu_sibling_map, cpu)) Loading
arch/x86/kernel/cpu/intel.c +3 −4 Original line number Diff line number Diff line Loading @@ -300,15 +300,14 @@ static void intel_workarounds(struct cpuinfo_x86 *c) } /* * P4 Xeon errata 037 workaround. * P4 Xeon erratum 037 workaround. * Hardware prefetcher may cause stale data to be loaded into the cache. */ if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_mask == 1)) { if (msr_set_bit(MSR_IA32_MISC_ENABLE, MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) { MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) { pr_info("CPU: C0 stepping P4 Xeon detected.\n"); pr_info("CPU: Disabling hardware prefetching (Errata 037)\n"); pr_info("CPU: Disabling hardware prefetching (Erratum 037)\n"); } } Loading