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Commit 5a4e33a3 authored by Sumit Singh's avatar Sumit Singh Committed by Daniel Vetter
Browse files

drm/i915/bxt: Enable PTE encoding 



The caching options for page table entries have remained the same as
Cherryview. This patch fixes it so the right code path is taken on BXT.

v2: Fix up commit message (Mike)

Signed-off-by: default avatarSumit Singh <sumit.k.singh@intel.com>
Signed-off-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Reviewed-by: default avatarSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 31d4dcf7

drivers/gpu/drm/i915/i915_gem_gtt.c

+2 −2
Original line number Diff line number Diff line
@@ -1687,7 +1687,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev) 




	if (INTEL_INFO(dev)->gen >= 8) {

		if (IS_CHERRYVIEW(dev))

		if (IS_CHERRYVIEW(dev) || IS_BROXTON(dev))

			chv_setup_private_ppat(dev_priv);

		else

			bdw_setup_private_ppat(dev_priv);
@@ -2375,7 +2375,7 @@ static int gen8_gmch_probe(struct drm_device *dev, 


	*gtt_total = (gtt_size / sizeof(gen8_pte_t)) << PAGE_SHIFT;



	if (IS_CHERRYVIEW(dev))

	if (IS_CHERRYVIEW(dev) || IS_BROXTON(dev))

		chv_setup_private_ppat(dev_priv);

	else

		bdw_setup_private_ppat(dev_priv);