Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 599ad66a authored by Naveen Yadav's avatar Naveen Yadav
Browse files

clk: qcom: videocc-kona: Enable safe config and HW_CTL mode for all RCGs



Enable the HW_CTL bit on RCGs in order to safely reconfigure and
update the RCG in the event that it's enabled from some other
hardware signal.

Change-Id: Id495ed88b58c8b0679a2b3972c1b3e3cc437ec6f
Signed-off-by: default avatarNaveen Yadav <naveenky@codeaurora.org>
parent 5294afaf
Loading
Loading
Loading
Loading
+4 −0
Original line number Diff line number Diff line
@@ -263,6 +263,8 @@ static struct clk_rcg2 video_cc_ahb_clk_src = {
	.hid_width = 5,
	.parent_map = video_cc_parent_map_0,
	.freq_tbl = ftbl_video_cc_ahb_clk_src,
	.enable_safe_config = true,
	.flags = HW_CLK_CTRL_MODE,
	.clkr.hw.init = &(struct clk_init_data){
		.name = "video_cc_ahb_clk_src",
		.parent_names = video_cc_parent_names_0_ao,
@@ -287,6 +289,7 @@ static struct clk_rcg2 video_cc_mvs0_clk_src = {
	.parent_map = video_cc_parent_map_1,
	.freq_tbl = ftbl_video_cc_mvs0_clk_src,
	.enable_safe_config = true,
	.flags = HW_CLK_CTRL_MODE,
	.clkr.hw.init = &(struct clk_init_data){
		.name = "video_cc_mvs0_clk_src",
		.parent_names = video_cc_parent_names_1,
@@ -325,6 +328,7 @@ static struct clk_rcg2 video_cc_mvs1_clk_src = {
	.parent_map = video_cc_parent_map_2,
	.freq_tbl = ftbl_video_cc_mvs1_clk_src,
	.enable_safe_config = true,
	.flags = HW_CLK_CTRL_MODE,
	.clkr.hw.init = &(struct clk_init_data){
		.name = "video_cc_mvs1_clk_src",
		.parent_names = video_cc_parent_names_2,