Loading asoc/codecs/bolero/tx-macro.c +18 −0 Original line number Diff line number Diff line Loading @@ -835,6 +835,8 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, int unmute_delay = TX_MACRO_DMIC_UNMUTE_DELAY_MS; struct device *tx_dev = NULL; struct tx_macro_priv *tx_priv = NULL; u16 adc_mux_reg = 0, adc_reg = 0, adc_n = 0; u16 dmic_clk_reg = 0; if (!tx_macro_get_data(component, &tx_dev, &tx_priv, __func__)) return -EINVAL; Loading @@ -855,6 +857,22 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: adc_mux_reg = BOLERO_CDC_TX_INP_MUX_ADC_MUX0_CFG1 + TX_MACRO_ADC_MUX_CFG_OFFSET * decimator; if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) { adc_reg = BOLERO_CDC_TX_INP_MUX_ADC_MUX0_CFG0 + TX_MACRO_ADC_MUX_CFG_OFFSET * decimator; adc_n = snd_soc_component_read32(component, adc_reg) & TX_MACRO_SWR_MIC_MUX_SEL_MASK; if (adc_n >= BOLERO_ADC_MAX) { dmic_clk_reg = BOLERO_CDC_TX_TOP_CSR_SWR_DMIC0_CTL + ((adc_n - 5) / 2) * 4; snd_soc_component_update_bits(component, dmic_clk_reg, 0x0E, tx_priv->dmic_clk_div << 0x1); } } snd_soc_component_update_bits(component, dec_cfg_reg, 0x06, tx_priv->dec_mode[decimator] << TX_MACRO_ADC_MODE_CFG0_SHIFT); Loading Loading
asoc/codecs/bolero/tx-macro.c +18 −0 Original line number Diff line number Diff line Loading @@ -835,6 +835,8 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, int unmute_delay = TX_MACRO_DMIC_UNMUTE_DELAY_MS; struct device *tx_dev = NULL; struct tx_macro_priv *tx_priv = NULL; u16 adc_mux_reg = 0, adc_reg = 0, adc_n = 0; u16 dmic_clk_reg = 0; if (!tx_macro_get_data(component, &tx_dev, &tx_priv, __func__)) return -EINVAL; Loading @@ -855,6 +857,22 @@ static int tx_macro_enable_dec(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_PRE_PMU: adc_mux_reg = BOLERO_CDC_TX_INP_MUX_ADC_MUX0_CFG1 + TX_MACRO_ADC_MUX_CFG_OFFSET * decimator; if (snd_soc_component_read32(component, adc_mux_reg) & SWR_MIC) { adc_reg = BOLERO_CDC_TX_INP_MUX_ADC_MUX0_CFG0 + TX_MACRO_ADC_MUX_CFG_OFFSET * decimator; adc_n = snd_soc_component_read32(component, adc_reg) & TX_MACRO_SWR_MIC_MUX_SEL_MASK; if (adc_n >= BOLERO_ADC_MAX) { dmic_clk_reg = BOLERO_CDC_TX_TOP_CSR_SWR_DMIC0_CTL + ((adc_n - 5) / 2) * 4; snd_soc_component_update_bits(component, dmic_clk_reg, 0x0E, tx_priv->dmic_clk_div << 0x1); } } snd_soc_component_update_bits(component, dec_cfg_reg, 0x06, tx_priv->dec_mode[decimator] << TX_MACRO_ADC_MODE_CFG0_SHIFT); Loading