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Commit 59318461 authored by Rob Herring's avatar Rob Herring
Browse files

irqchip: versatile-fpga: add support for arm,versatile-sic 



The secondary controller on ARM Versatile AB and PB is similar to
other ARM platforms, but has a pass-thru register to connect some
interrupts directly to interrupt inputs on the primary interrupt
controller. The PIC_ENABLES register needs to be configured for
proper operation when the matching node is arm,versatile-sic. Add the
the necessary IRQCHIP_DECLARE as well.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 2920bc9a

drivers/irqchip/irq-versatile-fpga.c

+11 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@ 
#define FIQ_ENABLE_SET		0x28

#define FIQ_ENABLE_CLEAR	0x2C



#define PIC_ENABLES             0x20	/* set interrupt pass through bits */



/**

 * struct fpga_irq_data - irq data container for the FPGA IRQ controller

 * @base: memory offset in virtual memory
@@ -213,7 +215,16 @@ int __init fpga_irq_of_init(struct device_node *node, 
	writel(clear_mask, base + IRQ_ENABLE_CLEAR);

	writel(clear_mask, base + FIQ_ENABLE_CLEAR);



	/*

	 * On Versatile AB/PB, some secondary interrupts have a direct

	 * pass-thru to the primary controller for IRQs 20 and 22-31 which need

	 * to be enabled. See section 3.10 of the Versatile AB user guide.

	 */

	if (of_device_is_compatible(node, "arm,versatile-sic"))

		writel(0xffd00000, base + PIC_ENABLES);



	return 0;

}

IRQCHIP_DECLARE(arm_fpga, "arm,versatile-fpga-irq", fpga_irq_of_init);

IRQCHIP_DECLARE(arm_fpga_sic, "arm,versatile-sic", fpga_irq_of_init);

#endif