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Commit 57d8b764 authored by Kumar Sanghvi's avatar Kumar Sanghvi Committed by David S. Miller
Browse files

cxgb4: Allow >10G ports to have multiple queues 



Based on original work by Divy Le Ray.

Signed-off-by: default avatarKumar Sanghvi <kumaras@chelsio.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a94cd705

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

+5 −4
Original line number Original line Diff line number Diff line
@@ -5614,9 +5614,10 @@ static const struct pci_error_handlers cxgb4_eeh = { 
	.resume         = eeh_resume,

	.resume         = eeh_resume,

};

};





static inline bool is_10g_port(const struct link_config *lc)

static inline bool is_x_10g_port(const struct link_config *lc)

{

{

	return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0;

	return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0 ||

	       (lc->supported & FW_PORT_CAP_SPEED_40G) != 0;

}

}





static inline void init_rspq(struct sge_rspq *q, u8 timer_idx, u8 pkt_cnt_idx,

static inline void init_rspq(struct sge_rspq *q, u8 timer_idx, u8 pkt_cnt_idx,
@@ -5640,7 +5641,7 @@ static void cfg_queues(struct adapter *adap) 
	int i, q10g = 0, n10g = 0, qidx = 0;

	int i, q10g = 0, n10g = 0, qidx = 0;





	for_each_port(adap, i)

	for_each_port(adap, i)

		n10g += is_10g_port(&adap2pinfo(adap, i)->link_cfg);

		n10g += is_x_10g_port(&adap2pinfo(adap, i)->link_cfg);





	/*

	/*

	 * We default to 1 queue per non-10G port and up to # of cores queues

	 * We default to 1 queue per non-10G port and up to # of cores queues
@@ -5655,7 +5656,7 @@ static void cfg_queues(struct adapter *adap) 
		struct port_info *pi = adap2pinfo(adap, i);

		struct port_info *pi = adap2pinfo(adap, i);





		pi->first_qset = qidx;

		pi->first_qset = qidx;

		pi->nqsets = is_10g_port(&pi->link_cfg) ? q10g : 1;

		pi->nqsets = is_x_10g_port(&pi->link_cfg) ? q10g : 1;

		qidx += pi->nqsets;

		qidx += pi->nqsets;

	}

	}