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Commit 579b7f3f authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/gk110b/gr: initvals differ from gk110 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 36b99026

drivers/gpu/drm/nouveau/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -271,6 +271,7 @@ nouveau-y += core/engine/graph/ctxnvd9.o 
nouveau-y += core/engine/graph/ctxnve4.o

nouveau-y += core/engine/graph/ctxgk20a.o

nouveau-y += core/engine/graph/ctxnvf0.o

nouveau-y += core/engine/graph/ctxgk110b.o

nouveau-y += core/engine/graph/ctxnv108.o

nouveau-y += core/engine/graph/ctxgm107.o

nouveau-y += core/engine/graph/nv04.o
@@ -292,6 +293,7 @@ nouveau-y += core/engine/graph/nvd9.o 
nouveau-y += core/engine/graph/nve4.o

nouveau-y += core/engine/graph/gk20a.o

nouveau-y += core/engine/graph/nvf0.o

nouveau-y += core/engine/graph/gk110b.o

nouveau-y += core/engine/graph/nv108.o

nouveau-y += core/engine/graph/gm107.o

nouveau-y += core/engine/mpeg/nv31.o

drivers/gpu/drm/nouveau/core/engine/device/nve0.c

+1 −1
Original line number Diff line number Diff line
@@ -229,7 +229,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] =  nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] =  nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  gk110b_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] =  nvf0_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;

drivers/gpu/drm/nouveau/core/engine/graph/ctxgk110b.c

0 → 100644
+94 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2013 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs <bskeggs@redhat.com>

 */



#include "ctxnvc0.h"



/*******************************************************************************

 * PGRAPH context register lists

 ******************************************************************************/



static const struct nvc0_graph_init

gk110b_grctx_init_sm_0[] = {

	{ 0x419e04,   1, 0x04, 0x00000000 },

	{ 0x419e08,   1, 0x04, 0x0000001d },

	{ 0x419e0c,   1, 0x04, 0x00000000 },

	{ 0x419e10,   1, 0x04, 0x00001c02 },

	{ 0x419e44,   1, 0x04, 0x0013eff2 },

	{ 0x419e48,   1, 0x04, 0x00000000 },

	{ 0x419e4c,   1, 0x04, 0x0000007f },

	{ 0x419e50,   2, 0x04, 0x00000000 },

	{ 0x419e58,   1, 0x04, 0x00000001 },

	{ 0x419e5c,   3, 0x04, 0x00000000 },

	{ 0x419e68,   1, 0x04, 0x00000002 },

	{ 0x419e6c,  12, 0x04, 0x00000000 },

	{ 0x419eac,   1, 0x04, 0x00001f8f },

	{ 0x419eb0,   1, 0x04, 0x0db00d2f },

	{ 0x419eb8,   1, 0x04, 0x00000000 },

	{ 0x419ec8,   1, 0x04, 0x0001304f },

	{ 0x419f30,   4, 0x04, 0x00000000 },

	{ 0x419f40,   1, 0x04, 0x00000018 },

	{ 0x419f44,   3, 0x04, 0x00000000 },

	{ 0x419f58,   1, 0x04, 0x00000000 },

	{ 0x419f70,   1, 0x04, 0x00006300 },

	{ 0x419f78,   1, 0x04, 0x000000eb },

	{ 0x419f7c,   1, 0x04, 0x00000404 },

	{}

};



static const struct nvc0_graph_pack

gk110b_grctx_pack_tpc[] = {

	{ nvd7_grctx_init_pe_0 },

	{ nvf0_grctx_init_tex_0 },

	{ nvf0_grctx_init_mpc_0 },

	{ nvf0_grctx_init_l1c_0 },

	{ gk110b_grctx_init_sm_0 },

	{}

};



/*******************************************************************************

 * PGRAPH context implementation

 ******************************************************************************/



struct nouveau_oclass *

gk110b_grctx_oclass = &(struct nvc0_grctx_oclass) {

	.base.handle = NV_ENGCTX(GR, 0xf1),

	.base.ofuncs = &(struct nouveau_ofuncs) {

		.ctor = nvc0_graph_context_ctor,

		.dtor = nvc0_graph_context_dtor,

		.init = _nouveau_graph_context_init,

		.fini = _nouveau_graph_context_fini,

		.rd32 = _nouveau_graph_context_rd32,

		.wr32 = _nouveau_graph_context_wr32,

	},

	.main  = nve4_grctx_generate_main,

	.mods  = nvf0_grctx_generate_mods,

	.unkn  = nve4_grctx_generate_unkn,

	.hub   = nvf0_grctx_pack_hub,

	.gpc   = nvf0_grctx_pack_gpc,

	.zcull = nvc0_grctx_pack_zcull,

	.tpc   = gk110b_grctx_pack_tpc,

	.ppc   = nvf0_grctx_pack_ppc,

	.icmd  = nvf0_grctx_pack_icmd,

	.mthd  = nvf0_grctx_pack_mthd,

}.base;

drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.h

+10 −0
Original line number Diff line number Diff line
@@ -75,7 +75,10 @@ void nve4_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *); 
void nve4_grctx_generate_unkn(struct nvc0_graph_priv *);

void nve4_grctx_generate_r418bb8(struct nvc0_graph_priv *);



void nvf0_grctx_generate_mods(struct nvc0_graph_priv *, struct nvc0_grctx *);



extern struct nouveau_oclass *nvf0_grctx_oclass;

extern struct nouveau_oclass *gk110b_grctx_oclass;

extern struct nouveau_oclass *nv108_grctx_oclass;

extern struct nouveau_oclass *gm107_grctx_oclass;
@@ -160,16 +163,23 @@ extern const struct nvc0_graph_pack nve4_grctx_pack_ppc[]; 
extern const struct nvc0_graph_pack nve4_grctx_pack_icmd[];

extern const struct nvc0_graph_init nve4_grctx_init_a097_0[];



extern const struct nvc0_graph_pack nvf0_grctx_pack_icmd[];



extern const struct nvc0_graph_pack nvf0_grctx_pack_mthd[];



extern const struct nvc0_graph_pack nvf0_grctx_pack_hub[];

extern const struct nvc0_graph_init nvf0_grctx_init_pri_0[];

extern const struct nvc0_graph_init nvf0_grctx_init_cwd_0[];



extern const struct nvc0_graph_pack nvf0_grctx_pack_gpc[];

extern const struct nvc0_graph_init nvf0_grctx_init_gpc_unk_2[];



extern const struct nvc0_graph_init nvf0_grctx_init_tex_0[];

extern const struct nvc0_graph_init nvf0_grctx_init_mpc_0[];

extern const struct nvc0_graph_init nvf0_grctx_init_l1c_0[];



extern const struct nvc0_graph_pack nvf0_grctx_pack_ppc[];



extern const struct nvc0_graph_init nv108_grctx_init_rstr2d_0[];



extern const struct nvc0_graph_init nv108_grctx_init_prop_0[];

drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c

+6 −6
Original line number Diff line number Diff line
@@ -279,7 +279,7 @@ nvf0_grctx_init_icmd_0[] = { 
	{}

};



static const struct nvc0_graph_pack

const struct nvc0_graph_pack

nvf0_grctx_pack_icmd[] = {

	{ nvf0_grctx_init_icmd_0 },

	{}
@@ -668,7 +668,7 @@ nvf0_grctx_init_be_0[] = { 
	{}

};



static const struct nvc0_graph_pack

const struct nvc0_graph_pack

nvf0_grctx_pack_hub[] = {

	{ nvc0_grctx_init_main_0 },

	{ nvf0_grctx_init_fe_0 },
@@ -704,7 +704,7 @@ nvf0_grctx_init_gpc_unk_2[] = { 
	{}

};



static const struct nvc0_graph_pack

const struct nvc0_graph_pack

nvf0_grctx_pack_gpc[] = {

	{ nvc0_grctx_init_gpc_unk_0 },

	{ nvd9_grctx_init_prop_0 },
@@ -718,7 +718,7 @@ nvf0_grctx_pack_gpc[] = { 
	{}

};



static const struct nvc0_graph_init

const struct nvc0_graph_init

nvf0_grctx_init_tex_0[] = {

	{ 0x419a00,   1, 0x04, 0x000000f0 },

	{ 0x419a04,   1, 0x04, 0x00000001 },
@@ -797,7 +797,7 @@ nvf0_grctx_init_cbm_0[] = { 
	{}

};



static const struct nvc0_graph_pack

const struct nvc0_graph_pack

nvf0_grctx_pack_ppc[] = {

	{ nve4_grctx_init_pes_0 },

	{ nvf0_grctx_init_cbm_0 },
@@ -809,7 +809,7 @@ nvf0_grctx_pack_ppc[] = { 
 * PGRAPH context implementation

 ******************************************************************************/



static void

void

nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)

{

	u32 magic[GPC_MAX][4];